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A Survey of IEEE 1588 Time Synchronization Performance

IEEE 1588 시간 동기화 성능에 대한 조사

  • Received : 2014.11.05
  • Accepted : 2015.02.09
  • Published : 2015.02.28

Abstract

Clock or time synchronization protocol is one of the crucial factors that could determine the quality of the communication. With the rapid development of the network technology, more robust clock synchronization algorithm is required. IEEE 1588 is one of the possible solutions for a robust clock synchronization algorithm; however, there are still some challenges that need to be concerned in IEEE 1588 in term of reducing and stabilizing the PDV value. This survey paper shows several solutions that could improve the performance of IEEE 1588, including modifying the PTP message transmission, optimizing PTP method, filtering techniques, and using the hardware timestamp instead of application layer timestamp, and so on. Despite the improvement that is created with these techniques, the clock synchronization algorithm is still an open issue in the network communication.

시간 동기화 프로토콜은 통신의 성능을 결정할 수 있는 중대한 요인 중 하나이며, 최근 네트워크의 빠른 발전으로 인하여 더욱 탄탄한 시간 동기화 알고리즘이 요구되고 있다. IEEE 1588은 탄탄한 시간 동기화 알고리즘을 위한 가능한 방법 중 하나이지만, 아직 PDV 값의 감소 및 안정화를 위한 고려되어야 할 몇 가지 문제점이 남아있다. 본 논문에서는 PTP 메시지 전송의 수정, PTP 메소드 최적화, 필터링 기술, 응용계층의 타임스템프를 대신하는 H/W 타임스템프 활용 등 IEEE 1588의 성능을 개선할 몇 가지 방법을 조사하여 각 기법의 특징을 분석하였다. 본 논문에서 소개된 성능의 개선에도 불구하고 네트워크 통신에서 시간 동기화 알고리즘은 아직 개선해야 할 많은 문제점을 가지고 있다.

Keywords

References

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