Cascaded Multi-Level Inverter Based IPT Systems for High Power Applications

Abstract

A single phase H-bridge inverter is employed in conventional Inductive Power Transfer (IPT) systems as the primary side power supply. These systems may not be suitable for some high power applications, due to the constraints of the power electronic devices and the cost. A high-frequency cascaded multi-level inverter employed in IPT systems, which is suitable for high power applications, is presented in this paper. The Phase Shift Pulse Width Modulation (PS-PWM) method is proposed to realize power regulation and selective harmonic elimination. Explicit solutions against phase shift angle and pulse width are given according to the constraints of the selective harmonic elimination equation and the required voltage to avoid solving non-linear transcendental equations. The validity of the proposed control approach is verified by the experimental results obtained with a 2kW prototype system. This approach is expected to be useful for high power IPT applications, and the output power of each H-bridge unit is identical by the proposed approach.

NOMENCLATURE

Q1 - Q8 : power MOSFETs.

D1 - D8 : MOSFET antiparallel diodes.

Lp : equivalent primary coil inductance.

Ls : equivalent secondary coil inductance.

Cp : resonant compensation capacitance for the primary circuit.

Cs : resonant compensation capacitance for the secondary circuit.

M : mutual inductance between the primary and secondary coils.

RL : equivalent load resistance.

E : DC source voltage.

uH1 : output voltage of the first H-bridge unit.

uH2 : output voltage of the second H-bridge unit.

u0 : synthesized voltage of the cascaded multilevel inverter.

ip : AC current in the primary transmitting coil.

Ts : period of the fundamental period.

Zs : reflection impedance of the secondary circuit.

(A)* : conjugate operation of A.

Re(A) : real component operation of A.

 

I. INTRODUCTION

Inductive Power Transfer (IPT) technology can deliver power from a power source to a load with no physical contact [1] in order to enhance systems’ flexibility. This technology adopts high-frequency electromagnetic coupling [2], [3], resonant inverters [4], power regulation [5] and control theory [6]. With IPT technology, devices can be applied in contaminated environments to avoid the influences of ice, dirt, moisture and other chemicals. In addition, IPT systems have been used in numerous applications including the wireless charging of biomedical implants [7], mining applications [8], under-water power supply [9] and electric vehicles [10]-[13].

For IPT systems, the resonant inverter is one of the most important components, which operates at relatively high frequency (5-100 kHz) compared to 50/60Hz. It generates and maintains a high-frequency resonant current in the primary coil, creating a strong magnetic field, which inductively generates an AC voltage of the same frequency in the secondary pick-up. Both the secondary and primary circuits are tuned at the resonant inverter’s operating frequency using compensation capacitors. However, the output power capacity of the single phase H-bridge resonant inverter [14] employed in conventional IPT systems is limited by the constraints of the power electronic devices and the cost. Therefore, it may not be able to meet some high-power application requirements, such as electric vehicles and rail transit systems.

Multi-level technology has advantages in terms of reducing the voltage stress of switching devices, limiting the changing rate of voltage (du/dt), degrading the harmonic density of output voltage, and increasing the output power capacity. Cascaded H-bridge multi-level inverters are much easier to implement modularization and they have the merits of increased flexibility and fewer electronic devices needed than diode-clamped and flying-capacitor multi-level inverters. Compared to a single H-bridge inverter, cascaded multi-level inverters have the following advantages: 1) the cascaded structure uses low-voltage and low-cost power semiconductor devices to enhance a high power output; 2) the cascaded inverters can be built with modularized components which helps to reduce the manufacture cost; 3) the limitation of a single H-bridge inverter power supply can be removed in aspects like heat dissipation, short time overload; and 4) the Total Harmonic Distortion (THD) of the output voltage of the inverter is lower than that of conventional single H-bridge inverter. Therefore, a cascaded H-bridge multi-level inverter is adopted in this paper as the high-frequency source for IPT systems.

The output power of a cascaded inverter can be directly regulated by altering the switching angle with no need for additional DC-DC devices. Furthermore, Selective Harmonic Elimination (SHE) methods can be applied in cascaded inverters to eliminate selective harmonic components of the output voltage. However, SHE equations are nonlinear, transcendental equations, so that no solution can be accomplished [15]. Homotopy and continuation theory based SHE methods are proposed to solve transcendental equations [16]-[18]. However, these approaches need preliminary off-line computation of the switching angles, and real time applications fetch the switching angles from pre-calculated lookup tables stored in the microcontroller’s internal memory.

Multi-level technology has been adopted in IPT systems in [19], [20]. A high frequency multi-level IPT system suitable for high power application was described in [19]. However, harmonic distortion, power losses, power factor and efficiency were analyzed in detail without consideration of the power regulation or/and selective harmonic elimination. Recently, a MOSFET-IGBT multi-level converter, which can reduce the overall costs and the number of harmonic components [20], was proposed for IPT based high frequency fast chargers. This converter needs to solve transcendental equations instead of providing explicit solutions for the SHE equation. A novel modulation strategy and a phase shift modulation algorithm for the multi-level inverters supplying IPT systems were proposed to minimize the switching loss and coil loss [21]. However, they ignored the power regulation.

In order to enhance the output power capacity of IPT systems, this paper employs a cascaded multi-level inverter instead of the conventional single H-bridge for supplying IPT systems. The Phase Shift Pulse Width Modulation (PS-PWM) method employed in cascaded multi-level inverters is proposed to realize both power regulation and selective harmonic elimination. Explicit solutions against phase shift angle and pulse width are given according to the constraints of the selective harmonic elimination equation and the required voltage avoiding solving nonlinear transcendental equations. Thus, the proposed method is suitable for real-time applications. The active output power of each H-bridge unit is analyzed. They are identical with the proposed approach.

This paper is organized as follows. In Section II, a detailed description of the structure design and the principle analysis of an IPT system based on a cascaded multilevel inverter are given. Section III describes the self-balancing output power of each H-bridge. The selective harmonic elimination and power regulation method for cascaded multi-level inverters supplying IPT systems is analyzed in detail in Section IV. Then, Section V shows the steady-state results of simulation and experimental systems operating at 2kW. The conclusion is finally drawn in Section VI.

 

II. STRUCTURE DESIGN AND PRINCIPLE ANALYSIS OF AN IPT SYSTEM BASED ON A CASCADED INVERTER

A. Structure Design and Principle Analysis of an IPT System Based on Cascaded Inverters

It is well-known that the larger the number of cascaded multilevel H-bridge inverters employed, the better the power quality of the IPT output voltage becomes. To enhance the quality of the voltage waveform and the output power in a cost-effective way, this paper aims to investigate a five-level inverter with two cascaded H-bridges instead of more H-bridges. This will be used as an example to demonstrate the findings of this study while considering the cost of the whole system. The structure of an IPT system based on a cascaded multilevel inverter with an S-S (series-series) tuned circuit is shown in Fig. 1. Each H-bridge inverter is connected with an isolated DC voltage source whose voltage may differ from one another. However, they are set to be the same as E in this paper. The DC voltage sources can be batteries or rectified voltages according to the required voltage and power.

Fig. 1.The schematic of IPT system based on a cascaded multi-level inverter.

Suppose that the series resonant tank on the primary and secondary pick-up sides are both tuned to the operating angular frequency ω of the H-bridges, then:

In this situation, the reflection impedance Zs of the secondary circuit becomes purely resistive.

B. Staircase Waveform Synthesis with PS-PWM

The output of the cascaded multi-level inverter is synthesized by superimposing two identical staircases with different phase shift angles. The synthesized voltage ( u0 ) can be continuously regulated by Phase Shift Pulse Width Modulation (PS-PWM) of the two H-bridge units’ voltages ( uH1 and uH2 ) in order to meet various power requirements.

To simplify the analysis, a coordinate is established as shown in Fig.2. Line x is the symmetrical center line of the positive pulse width of the synthesized voltage. The origin is the joint of line x and the horizontal axis (ωt ), while the fundamental angular frequency is ( ω ), and the fundamental period is ( Ts ). Consequently, the pulse width of uH1 can be expressed by 2θL , measured in radians. The angular difference between the center of u0 and the center of uH1 is θΔ. The phase shift angle is denoted by 2θΔ.

Fig. 2.Schematic of staircase synthesis method.

The synthesized voltage u0 of the cascaded inverter is the superposition of uH1 and uH2 . Therefore, the synthesized voltage can be described mathematically as:

The output voltage of each H-bridge uHi (t)(i=1, 2) is defined by:

When synthesizing two identical staircases with different phase shift angles, there will be two possible situations: (a) θΔ+θL≤π/2 and (b) π/2≤θΔ+θL .

In the first situation ( θΔ+θL≤π/2 ), one switching cycle operation of the cascaded inverter is divided into eight submodes as follows. The driving signals of the MOSFETs are shown in Fig. 3. The switch-mode transitions and the resonant current pathways in the proposed cascaded inverter are illustrated in Fig. 4.

Fig. 3.Relevant voltage and current operating waveforms.

Fig. 4.Mode transitions during one switching cycle.

[Mode 1]:Q2 , Q6 , and Q7 switch on, and D1 is naturally forward biased. The synthesized voltage of the inverter turns to be –E .

[Mode 2]: Before the current commutation (mode 2(a)), Q2 and Q6 switch on, and D1 and D5 are naturally forward biased. After the current commutation (mode 2(b)), Q1 and Q5 switch on, and D2 and D6 are naturally forward biased. The synthesized voltage turns to be zero.

[Mode 3]: Q1 , Q4 , and Q5 switch on, and D6 is naturally forward biased. The synthesized voltage becomes E .

[Mode 4]: Q1 , Q4 , Q5 , and Q8 switch on, and the synthesized voltage turns to be 2E .

[Mode 5]: Q4 , Q5 , and Q8 switch on, and D3 is naturally forward biased. The synthesized voltage becomes E .

[Mode 6]: Before the current commutation (mode 6(a)), Q4 and Q8 switch on, and D3 and D7 are naturally forward biased. After the current commutation (mode 6(b)), Q3 and Q7 switch on, and D4 and D8 are naturally forward biased. The synthesized voltage becomes zero.

[Mode 7]: Q2 , Q3 , and Q7 switch on, and D8 is naturally forward biased. The synthesized voltage becomes –E ;

[Mode 8]: Q2 , Q3 , Q6 , and Q7 switch on. The synthesized voltage becomes –2E .

C. Staircase Waveform Synthesis with PS-PWM

In the second situation ( π/2≤θΔ+θL ), the zero voltage is produced by synthesizing the two voltages of the two opposite voltage levels produced by two H-bridge units ( H1 and H2 ) as shown in the blue line of Fig. 2. In this case, one H-bridge unit will charge the other H-bridge unit, and the reverse situation will occur in the second half period. This phenomenon influences the stability of the synthesized voltage and will probably damage the DC sources of each H-bridge unit.

One switching cycle operation of the second situation can also be divided into eight submodes, in which Modes 1, 3, 5, 7, and 8 are exactly the same as those of the first situation. However, there are two different modes between the first and the second situation. A detailed analysis is given below:

[Mode 2]: Before the current commutation (Fig. 5(a)), the DC source of H2 charges the DC source of H1 through D1 , D4 , Q6 , and Q7 . After the current commutation (Fig. 5(b)), the DC source of H1 charges the DC source of H2 through Q1 , Q4 , D5 , and D7 . The voltages of the two H-bridges cancel each other out and the synthesized voltage becomes zero.

Fig. 5.Operating modes of the switching devices.

[Mode 6]: Before the current commutation (Fig. 5(c)), the DC source of H1 charges the DC source of H2 through D2 , D3 , Q5 , and Q8 . After the current commutation (Fig. 5(d)), the DC source of H2 charges the DC source of H1 through Q2 , Q3 , D5 , and D8 . The voltages of the two H-bridge cancel each other out and the synthesized voltage becomes zero.

To avoid the aforementioned drawbacks, θL and θΔ should satisfy the following constraint:

 

III. ANALYSIS OF THE SELF-BALANCING OUTPUT POWER

After applying a Fourier Transformation to uHi (t) , the phasor of the kth order harmonic is in the form of:

According to (3) and (6), the phasor of the kth order harmonic is provided by:

The current of the primary coil can be derived by:

iP will be in phase with the fundamental synthesized voltage ( u0(1) ) when the circuit is tuned at the resonant frequency. The active power of the fundamental output of H-bridge unit H1 can be obtained by:

where and IP denote the phasor and Root Mean Square (RMS) of the converter output current.

Similarly, the active power of the fundamental output of H2 can be expressed in terms of θL and θΔ as:

Comparing (9) and (10), it is obvious that PH1=PH2 , which means that the active output power of each H-bridge unit is identical. That is to say, the output power of each H-bridge is self-balanced.

 

IV. HARMONIC ELIMINATION AND POWER REGULATION METHOD (HEPRM)

A. Selective Harmonic Elimination

When the kth order harmonic of uo(t) is selected to be eliminated, the harmonic elimination equation is provided according to (7) by:

The solutions of (11) are given by:

Considering the odd multiples of the kth order harmonic and according to (12) and(13), the following are obtained:

The two equations above satisfy (11), which eliminates the kth order harmonic and the odd multiples of the kth order harmonic. Taking the 3rd order harmonic elimination as an example, the corresponding 9th, 15th, etc. order harmonics can be eliminated.

As the lower harmonic components have more influence than the higher harmonic components in some applications, the 3rd harmonic component is selected to be eliminated in this paper. Consequently, the following is obtained:

By solving (16) with the constraint of (5), the formula yields θΔ=π/6 or θL=π/3 . When θΔ=π/6 or θL=π/3 , the 3rd order harmonic and the odd triplen harmonics are eliminated.

B. Power Regulation with the HEPRM

The IPT output power can be described as a function of Uo(1) as follows:

Therefore, the output power can be regulated by changing the fundamental RMS Uo(1) of the synthesized voltage. Thus, Uo(1) can be derived from (7):

Substitute θΔ=π/6 into (18). Then Uo(1) can be expressed by:

With the restriction of (5):

In this case,

Similarly, when θL=π/3 , Uo(1) can be expressed by:

With the restriction of (5), there is:

Thus, Uo(1) ranges over

In a word, the fundamental RMS of the synthesized voltage can be regulated continuously from 0 to with the elimination of the 3rd harmonic as shown in Fig. 6. It is worth noting that this synthesized voltage will degrade to a three-level staircase when the required synthesized voltage drops below Consequently, the synthesized voltage can be divided into 3 zones according to aforementioned discussion.

Fig. 6.θL and θΔ against the RMS of the fundamental voltage.

 

V. SIMULATION AND EXPERIMENTAL VERIFICATION

The performance of the proposed control method is firstly verified via MATLAB/SIMULINK and then realized and tested in an experimental setting. To be consistent, all of the parameters in both the simulation and the experiment are the same as those given in Table I.

TABLE ITHE CONFIGURATION OF THE IPT SYSTEM

A. Simulation Results

To verify the validity of the proposed control method, a simulation model of the cascaded two-H-bridge inverter was constructed in Matlab/Simulink. Detailed configuration information is given in Table I.

Zone 1 ( θΔ=π/6,0≤θL≤π/6 ): the inverter outputs a synthesized voltage over and appears as a three-level voltage waveform as shown in Fig. 7(a). The 3rd order harmonic and the odd triplen harmonics have been completely eliminated, and its fundamental RMS complies with (14) (the experimental values are slightly smaller than the theoretical ones, because there are internal resistances in the power switches). The Total Harmonic Distortion (THD) is rather high (up to 75.32%) under such an operating condition.

Fig. 7.The simulation waveform of voltage and current of primary side and secondary side, synthesized voltage harmonic analysis when θΔ=π/6, θL=π/9 .

Fig. 8.The simulation waveform of voltage and current of the θΔ=π/6, θL=π/4 . cascaded inverter when

Zone 2 (θΔπ/6, π/6≤θLπ/3 ): the amplitude of the synthesized voltage ranges over and is a five-level staircase waveform. In such an operating condition, the THD is relatively low (up to 33.12%) as shown in Fig. 10.

Fig. 9.The simulation waveform of voltage and current of the cascaded inverter when θΔ=π/10, θL=π/3 .

Fig. 10.Harmonic density against the synthesized voltage. Input voltage is 50V dc.

Zone 3 ( 0≤θΔ≤π/6, θL=π/3 ): the synthesized voltage is a five-level staircase ranging in the segment of In such a case, the THD is rather low (up to 16.73%) as shown in Fig. 10.

The THD of the 3rd , 5th and 7th harmonics against Uo(1) are shown in Fig. 10. The THD is low if Uo(1) is relatively high. However, the THD becomes relatively high if Uo(1) decreases to a relatively low level. In addition, the 3rd order harmonic remains at a low level when the synthesized voltage varies.

B. Experimental Results

Applying the system configuration in Table I, an IPT system is established based on a cascaded multilevel inverter with a TMS320F28335 as the controller and an IRF3710 as the power switch. The primary and secondary coils are wound with Litz wire and the distance between the two coils is set to be 50mm. The experimentation setup is shown in Fig. 11. Because of the limited capacity of the MOSFET, the maximum output power of the IPT system is around 2kW. Correspondingly, the rated power of each H-bridge unit is approximately 1kW.

Fig. 11.The experimentation setup of a 2 kW IPT system. (a)Experimental setup. (b)Lateral view of the coils. (c)Top view of the coils.

In Fig. 12, the inverter output degrades to a three-level staircase. The 3rd order harmonic and its odd triplen harmonics have been completely eliminated. However, the 5th and 7th order harmonic distortions remain high (up to 25% and 15%, respectively), and Uo(1) is rather low (24V). The inverter output power is approximately 180W (each of the H-bridge units, H1 and H2 , has an output power of 90W). The load of the secondary circuit consumes about 120W and the IPT system has an efficiency of around 75%. In Fig. 13 and Fig. 14, the synthesized voltages appear to be five-level staircases, and the 3rd order harmonic and their odd triplen harmonics are also eliminated with a low THD (35% and 16.91%, respectively). In the two cases, the values of Uo(1) are set to be 43V and 70V, respectively. Correspondingly, the inverter output powers are 600W (the output power of both H-bridge units, H1 and H2 , are approximately 300W) and 1600W (800W for each H-bridge unit). The power consumption of the secondary loads are 480W and 1400W, which yield efficiencies of 80% and 87.5%, respectively.

Fig. 12.The waveform of voltage and current of primary and secondary sides, synthesized voltage harmonic analysis when θΔ=π/6, θL=π/10 .

Fig. 13.The waveform of voltage and current of primary and secondary sides, synthesized voltage harmonic analysis when θΔ/6, θL=π/5 .

Fig. 14.The waveform of voltage and current of primary side and secondary side, output voltage harmonic analysis when θΔ=π/12, θL=π/3 .

In this experiment, various values of θΔ and θL are adopted to verify the performance of the HEPRM. A comparison of the RMS of the experimental and theoretical synthesized voltages is shown in Fig. 15. The trends of the changes in the experimental and theoretical values are similar. However, the theoretical values are slightly smaller than the experimental ones because of the internal resistance of the power switches and the equivalent circuit resistance. When the synthesized voltage increases (the current also increases), the experimental values differ greater from the theoretical values.

Fig. 15.The curve of experimentation and theoretical value of the fundamental voltage’s RMS against θL and θΔ .

 

VI. CONCLUSION

This paper proposed a HEPRM method for IPT systems to enhance the power capacity of these systems, eliminate selective order harmonics, and simultaneously regulate the IPT output power. This is achieved by changing the phase shift angle and pulse width according to the explicit relation of the two quantities. In this analysis, a five-level two-H-bridge inverter is taken as an example to provide the explicit expression of the phase shift angle and pulse width. The proposed method is verified with simulation and experimental results. These results allow some conclusions to be made. When compared with traditional IPT systems based on a single phase H-bridge inverter, the system has the following characteristics:

1) The proposed system enhances the IPT output power when using the switches with the same capacity.

2) The system employs the staircase synthesis method instead of high-frequency modulation. Thus, it is applicable to the high-frequency inverters employed in IPT systems, and each cascaded H-bridge unit has the power self-balancing characteristic.

3) The system can eliminate selective order harmonics of the output voltage. The explicit expression of the phase shift angle and pulse width can be obtained without solving higher transcendental equations. As a result, the computational complexity is reduced and real-time control is facilitated.

4) The system eliminates the 3rd order harmonic and the odd triplen harmonics. It also continuously regulates the output power without an additional DC-DC converter.

5) The system’s synthesized voltage appears to be a three-level staircase with a low fundamental RMS and a high THD. Meanwhile, the synthesized voltage appears to be a five-level staircase with a large fundamental RMS and a low THD. This means that the characteristics of the proposed method are suitable for high power applications.

This work was supported by Scientific R&D Program of China Railway Corporation (2014J013-B) and National Natural Science Foundation of China (Grant No. 51507147).