과제정보
연구 과제 주관 기관 : 상지대학교
참고문헌
- A. Parikh, Soontae Kim, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, "Instruction Scheduling for Low Power", Journal of VLSI Signal Processing, Vol.37, pp.129-149, 2004. https://doi.org/10.1023/B:VLSI.0000017007.28247.f6
- Kyuwon Choi, Abhijit Chatterjee, "Efficient Instruction-Level Optimization Methodology for Low Power Embedded Systems", ISSS 2001, 2001.
- R. Leaupers, "Compiler Design Issues for Embedded Processors", IEEE Design & Test of Computers, pp.2-9, 2002.
- Timothy M. Jones et al., "Energy-Efficient Register Caching with Compiler Assistance", ACM Transactions on Architecture and Code Optimization, Vol.6, No.4, Article 13, 2009.
- Meikang Qiu et al., "Energy-aware Loop Scheduling and Assignment for Multi-core, Multi-functional Unit Architecture", Journal of Signal Processing System, Vol.57, pp.363-379, 2009. https://doi.org/10.1007/s11265-008-0312-5