Journal of Computing Science and Engineering

Korean Institute of Information Scientists and Engineers (한국정보과학회)
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Exploiting Standard Deviation of CPI to Evaluate Architectural Time-Predictability

  • Zhang, Wei (Department of Electrical and Computer Engineering, Virginia Commonwealth University) ;
  • Ding, Yiqiang (Department of Electrical and Computer Engineering, Virginia Commonwealth University)
  • Received : 2013.07.26
  • Accepted : 2014.02.10
  • Published : 2014.03.30
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Abstract

Time-predictability of computing is critical for hard real-time and safety-critical systems. However, currently there is no metric available to quantitatively evaluate time-predictability, a feature crucial to the design of time-predictable processors. This paper first proposes the concept of architectural time-predictability, which separates the time variation due to hardware architectural/microarchitectural design from that due to software. We then propose the standard deviation of clock cycles per instruction (CPI), a new metric, to measure architectural time-predictability. Our experiments confirm that the standard deviation of CPI is an effective metric to evaluate and compare architectural time-predictability for different processors.

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References

  1. R. Wilhelm, J. Engblom, A. Ermedahl, N. Holsti, S. Thesing, D. Whalley, ... P. Stenstrom, "The worst-case execution time problem: overview of methods and survey of tools," ACM Transactions on Embedded Computing Systems, vol. 7, no. 3, article no. 36, 2008.
  2. L. Thiele and R. Wilhelm, "Design for time-predictability," in Design of Systems with Predictable Behaviour, Dagstuhl, Germany: Internationales Begegnungs- und Forschungszentrum fur Informatik, 2004.
  3. M. Colnaric and W. A. Halang, "Architectural support for predictability in hard real time systems," Control Engineering Practice, vol. 1, no. 1, pp. 51-57, 1993. https://doi.org/10.1016/0967-0661(93)92102-A
  4. M. Delvai, W. Huber, P. Puschner, and A. Steininger, "Processor support for temporal predictability: the SPEAR design example," in Proceedings of the 15th Euromicro Conference on Real-Time Systems, Porto, Portugal, 2003, pp. 169-176.
  5. S. A. Edwards and E. A. Lee, "The case for the precision timed (PRET) machine," in Proceedings of the 44th annual Design Automation Conference, San Diego, CA, 2007, pp. 264-265.
  6. N. Yamasaki, I. Magaki, and T. Itou, "Prioritized SMT architecture with IPC control method for real-time processing," in Proceedings of the 13th IEEE Real Time and Embedded Technology and Applications Symposium, Bellevue, WA, 2007, pp. 12-21.
  7. M. Paolieri, E. Quinones, F. J. Cazorla, G. Bernat, and M. Valero, "Hardware support for WCET analysis of hard realtime multicore systems," in Proceedings of the 36th Annual International Symposium on Computer Architecture, Austin, TX, 2009, pp. 57-68.
  8. M. Schoeberl, "Time-predictable computer architecture," EURASIP Journal on Embedded Systems, vol. 2009, article no. 2, 2009.
  9. Y. T. S. Li and S. Malik, "Performance analysis of embedded software using implicit path enumeration," in Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Real-Time Systems, Montreal, Canada, 1995, pp. 88-98.
  10. SimpleScalar, http://www.simplescalar.com.
  11. J. Gustafsson, A. Betts, A. Ermedahl, and B. Lisper, "The Malardalen WCET benchmarks: past, present and future," in Proceedings of the 10th International Workshop on Worst-Case Execution Time Analysis, Brussels, Belgium, 2010, pp. 136-146.
  12. D. Grund, "Towards a formal definition of timing predictability," in Proceedings of Workshop on Reconciling Performance with Predictability, Grenoble, France, 2009.
  13. D. Grund, J. Reineke, and R. Wilhelm, "A template for predictability definitions with supporting evidence," in Bringing Theory to Practice: Predictability and Performance in Embedded Systems, Wadern, Germany: Schloss Dagstuhl - Leibniz-Zentrum fur Informatik, pp. 22-31, 2011.
  14. R. Kirner and P. Puschner, "Time-predictable computing," in Proceedings of the 8th IFIP WG 10.2 International Workshop on Software Technologies for Embedded and Ubiquitous Systems, Waidhofen/Ybbs, Austria, 2010, pp. 23-24.
  15. Y. Ding and W. Zhang, "Architectural time-predictability factor (ATF): a metric to evaluate time predictability of processors," ACM SIGBED Review, vol. 9, no. 4, pp. 6-15, 2012. https://doi.org/10.1145/2452537.2452538

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