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A CMOS Envelope Tracking Power Amplifier for LTE Mobile Applications

  • Ham, Junghyun (Department of Electrical, Electronic, and Computer Engineering, Sungkyunkwan University) ;
  • Jung, Haeryun (Department of Electrical, Electronic, and Computer Engineering, Sungkyunkwan University) ;
  • Kim, Hyungchul (Department of Electrical, Electronic, and Computer Engineering, Sungkyunkwan University) ;
  • Lim, Wonseob (Department of Electrical, Electronic, and Computer Engineering, Sungkyunkwan University) ;
  • Heo, Deukhyoun (Electrical Engineering and Computer Science Department, Washington State University) ;
  • Yang, Youngoo (Department of Electrical, Electronic, and Computer Engineering, Sungkyunkwan University)
  • 투고 : 2013.11.27
  • 심사 : 2014.02.22
  • 발행 : 2014.04.30

초록

This paper presents an envelope tracking power amplifier using a standard CMOS process for the 3GPP long-term evolution transmitters. An efficiency of the CMOS power amplifier for the modulated signals can be improved using a highly efficient and wideband CMOS bias modulator. The CMOS PA is based on a two-stage differential common-source structure for high gain and large voltage swing. The bias modulator is based on a hybrid buck converter which consists of a linear stage and a switching stage. The dynamic load condition according to the envelope signal level is taken into account for the bias modulator design. By applying the bias modulator to the power amplifier, an overall efficiency of 41.7 % was achieved at an output power of 24 dBm using the 16-QAM uplink LTE signal. It is 5.3 % points higher than that of the power amplifier alone at the same output power and linearity.

키워드

참고문헌

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피인용 문헌

  1. Dual Bias Modulator for Envelope Tracking and Average Power Tracking Modes for CMOS Power Amplifier vol.14, pp.6, 2014, https://doi.org/10.5573/JSTS.2014.14.6.802