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피인용 문헌
- Cu/SiO2CMP Process for Wafer Level Cu Bonding vol.20, pp.2, 2013, https://doi.org/10.6117/kmeps.2013.20.2.047
- Effects of Wafer Warpage on the Misalignment in Wafer Level Stacking Process vol.20, pp.3, 2013, https://doi.org/10.6117/kmeps.2013.20.3.071
- Development of Cu CMP process for Cu-to-Cu wafer stacking vol.20, pp.4, 2013, https://doi.org/10.6117/kmeps.2013.20.4.081
- Warpage Characteristics Analysis for Top Packages of Thin Package-on-Packages with Progress of Their Process Steps vol.21, pp.2, 2014, https://doi.org/10.6117/kmeps.2014.21.2.065
- Effects of forming gas plasma treatment on low-temperature Cu–Cu direct bonding vol.55, pp.6S3, 2016, https://doi.org/10.7567/JJAP.55.06JC02
- Wafer level Cu–Cu direct bonding for 3D integration vol.137, 2015, https://doi.org/10.1016/j.mee.2014.12.012
- Warpage Characteristics of Bottom Packages for Package-on-Package(PoP) with Different Chip Mounting Processes vol.20, pp.3, 2013, https://doi.org/10.6117/kmeps.2013.20.3.063
- Research of Wafer Level Bonding Process Based on Cu–Sn Eutectic vol.11, pp.9, 2013, https://doi.org/10.3390/mi11090789