전자공학회논문지 (Journal of the Institute of Electronics and Information Engineers)

  • 제50권6호
  • /
  • Pages.131-137
  • /
  • 2013
  • /
  • 2287-5026(pISSN)
  • /
  • 2288-159X(eISSN)
대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지
DOI QR코드

DOI QR Code

광각 카메라를 위한 저 복잡도 실시간 베럴 왜곡 보정 프로세서의 설계 및 구현

Design and Implementation of a Low-Complexity Real-Time Barrel Distortion Corrector for Wide-Angle Cameras

  • 정희성 (국항공대학교 항공전자및정보통신공학부) ;
  • 김원태 (국항공대학교 항공전자및정보통신공학부) ;
  • 이광호 (국항공대학교 항공전자및정보통신공학부) ;
  • 김태환 (국항공대학교 항공전자및정보통신공학부)
  • Jeong, Hui-Seong (School of electronics, Telecommunication and computer engineering, Korea Aerospace University) ;
  • Kim, Won-Tae (School of electronics, Telecommunication and computer engineering, Korea Aerospace University) ;
  • Lee, Gwang-Ho (School of electronics, Telecommunication and computer engineering, Korea Aerospace University) ;
  • Kim, Tae-Hwan (School of electronics, Telecommunication and computer engineering, Korea Aerospace University)
  • 투고 : 2013.03.12
  • 발행 : 2013.06.25
PDF 다운로드
⟨ 이전 논문 다음 논문 ⟩

초록

광각 카메라는 단 초점 렌즈를 장착하여 넓은 시야의 이미지를 처리하는데, 렌즈의 광학 문제로 인해 이미지에 베럴 왜곡(barrel distortion)이 발생한다. 본 논문에서는 베럴 왜곡을 실시간 디지털 신호처리를 통해 보정하기 위한 낮은 복잡도의 프로세서 구조를 제시하고 이를 실제 구현하여 유효성을 검증하였다. 제안하는 왜곡 보정 프로세서는 하드웨어 복잡도를 낮추기 위해서, 좌표 위치 보정에 필요한 계산을 점증적(incremental)으로 수행한다. 또한, 높은 보정 속도를 달성하기 위해 파이프 라인 구조로 설계하였다. 설계된 보정 프로세서는 $0.11{\mu}m$ complementary metal-oxide semiconductor(CMOS) 공정을 사용하여 14.3K의 논리 게이트로 구현되었다. $2048{\times}2048$ 픽셀 영상에 대하여, 최대 314MHz의 동작 주파수로 초당 74.86번의 속도로 보정이 가능하다.

The barrel distortion makes serious problems in a wide-angle camera employing a lens of a short focal length. This paper presents a low-complexity hardware architecture for a real-time barrel distortion corrector and its implementation. In the proposed barrel distortion corrector, the conventional algorithm is modified so that the correction is performed incrementally, which results in the reduction of the number of required hardware modules for the distortion correction. The proposed barrel distortion corrector has a pipelined architecture so as to achieve a high-throughput correction. The correction rate is 74.86 frames per sec at the operating frequency of 314MHz in a $0.11{\mu}m$ CMOS process, where the frame size is $2048{\times}2048$. The proposed barrel distortion corrector is implemented with 14.3K logic gates.

키워드

참고문헌

  1. 김선영, 윤인혜, 김동균, 백준기, "나선형 패턴을 사용한 어안렌즈 영상 교정 및 기하학적 왜곡 보정," 전자공학회논문지, 제49권, 제4호, 16-22쪽, 2012년 7월
  2. 반 토안 카오, 조상복, "A new method using geometric invariability for lens distortion correction," 전자공학회논문지, 제48권 SP편, 제6호, 115-123쪽, 2011년 11월
  3. L. Qiang, and N. Allison, "FPGA implementation of pipelined architecture for optical imaging correction," in Proc. IEEE Workshop on Signal Processing Systems (SIPS), pp. 182-187, Banff, Alta, Oct. 2006.
  4. P. Y. Chen, C. C. Huang, Y. H. Shiau, and Y. T. Chen, "A VLSI implementation of barrel distortion correction for wide-angle camera images," IEEE Transactions on Circuits and Systems II Express Briefs, vol. 56, no. 1, pp. 51-55, Jan. 2009. https://doi.org/10.1109/TCSII.2008.2010165
  5. S. Chen, H. Huang, and C. Luo, "Time multiplexed VLSI architecture for real-time barrel distortion correction in video- endoscopic images," IEEE Transactions on Circuits and Systems for Video Technology, vol. 21, no. 11, pp. 1612-1621, November 2011. https://doi.org/10.1109/TCSVT.2011.2129850
  6. H. T. Ngo and V. K. Asari, "A pipelined architecture for real-time correction of barrel distortion in wide-angle camera images," IEEE Transactions on Circuits and Systems for Video Technology, vol. 15, no. 3, pp. 436-444, Mar. 2005. https://doi.org/10.1109/TCSVT.2004.842609
  7. H. Blasinski, W. Hai, and F. Lohier, "FPGA architecture for real-time barrel distortion correction of colour images," in Proc. IEEE International Conference Multimedia and Expo (ICME), pp. 1-6, Barcelona, Spain, July. 2011.
  8. H. Ngo, and V. Asari, "Developing a FPGA -based high performance, power-aware architecture for real- time radial lens distortion correction of video stream," ICGST International. J. on Programnable Devices, Circuits and Systems, PDCS., vol. 7, pp. 33-41, May. 2007.
  9. H. Zbeng, and J. Li, "Real-time correction of distortion image based on FPGA," in Proc. IEEE International Conference on Intelligent Computing and Integrated Systems (ICISS), pp. 167-170, Guilin, Oct. 2010.
  10. V. K. Asari, S. Kumar, and D. Radbakrishnan, "A new approach for nonlinear distortion correction in endoscopic images based on least squares estimation," IEEE Transactions on Medical Image, vol. 18, no. 4, pp. 345-354, Apr. 1999. https://doi.org/10.1109/42.768843
  11. Hughes, L. E. C., "Telecommunications XX-IV: The Raster," Electrician 116., pp. 351-352, Mar. 1936.
  12. C. S. Wallace, "A suggestion for a fast multiplier," IEEE Transactions on Electronic Computers, vol. EC-13, no. 1, pp. 14-017, Feb. 1964. https://doi.org/10.1109/PGEC.1964.263830

피인용 문헌

  1. A Low-Complexity Real-Time Barrel Distortion Correction Processor Combined with Color Demosaicking vol.51, pp.9, 2014, https://doi.org/10.5573/ieie.2014.51.9.057