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A Real-Time Virtual Re-Convergence Hardware Platform

  • Kim, Jae-Gon (Dep. of Mobile Systems Engineering, Sungkyunkwan University) ;
  • Kim, Jong-Hak (Dep. of Mobile Systems Engineering, Sungkyunkwan University) ;
  • Ham, Hun-Ho (Dep. of Mobile Systems Engineering, Sungkyunkwan University) ;
  • Kim, Jueng-Hun (Dep. of Mobile Systems Engineering, Sungkyunkwan University) ;
  • Park, Chan-Oh (Dep. of Mobile Systems Engineering, Sungkyunkwan University) ;
  • Park, Soon-Suk (Dep. of Mobile Systems Engineering, Sungkyunkwan University) ;
  • Cho, Jun-Dong (Dep. of Mobile Systems Engineering, Sungkyunkwan University)
  • Received : 2011.08.01
  • Published : 2012.06.30

Abstract

In this paper, we propose a real-time virtual re-convergence hardware platform especially to reduce the visual fatigue caused by stereoscopy. Our unique idea to reduce visual fatigue is to utilize the virtual re-convergence based on the optimized disparity-map that contains more depth information in the negative disparity area than in the positive area. Our virtual re-convergence hardware platform, which consists of image rectification, disparity estimation, depth post-processing, and virtual view control, is realized in real time with 60 fps on a single Xilinx Virtex-5 FPGA chip.

Keywords

References

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