Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
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A Design of Current-mode Buck-Boost Converter using Multiple Switch with ESD Protection Devices

ESD 보호 소자를 탑재한 다중 스위치 전류모드 Buck-Boost Converter

  • Kim, Kyung-Hwan (Electronics and Electrical Engineering, Dankook University) ;
  • Lee, Byung-Suk (Electronics and Electrical Engineering, Dankook University) ;
  • Kim, Dong-Su (Electronics and Electrical Engineering, Dankook University) ;
  • Park, Won-Suk (Electronics and Electrical Engineering, Dankook University) ;
  • Jung, Jun-Mo (Department of Electronics Engineering Seokyeong University)
  • 김경환 (단국대학교 전기전자공학과) ;
  • 이병석 (단국대학교 전기전자공학과) ;
  • 김동수 (단국대학교 전기전자공학과) ;
  • 박원석 (단국대학교 전기전자공학과) ;
  • 정준모 (서경대학교 전자공학과)
  • Received : 2011.12.01
  • Accepted : 2011.12.23
  • Published : 2011.12.30
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Abstract

In this paper, a current-mode buck-boost converter using Multiple switching devices is presented. The efficiency of the proposed converter is higher than that of conventional buck-boost converter. In order to improve the power efficiency at the high current level, the proposed converter is controlled with PWM(pulse width modulation) method. The converter has maximum output current 300mA, input voltage 3.3V, output voltage from 700mV to 12V, 1.5MHz oscillation frequency, and maximum efficiency 90%. Moreover, this paper proposes watchdog circuits in order to ensure the reliability and to improve the performance of dc-dc converters. An electrostatic discharge(ESD) protection circuit for deep submicron CMOS technology is presented. The proposed circuit has low triggering voltage using gate-substrate biasing techniques. Simulated result shows that the proposed ESD protection circuit has lower triggering voltage(4.1V) than that of conventional ggNMOS(8.2V).

본 논문에서는 다중 스위치를 이용한 전류모드 벅-부스트 컨버터의 벅-부스트 컨버터를 제안하였다. 제안한 컨버터는 넓은 출력 전압 범위와 높은 전류 레벨에서 높은 전력 변환 효율을 갖기 위해 PWM 제어법을 이용하였다. 제안한 컨버터는 최대 출력전류 300mA, 입력 전압 3.3V, 출력 전압 700mV~12V, 1.5MHz의 스위칭 주파수, 최대효율 90% 갖는다. 또한, dc-dc 컨버터의 신뢰성과 성능을 향상시키기 위해 보호회로를 추가하였다. 그리고 Deep-submicron 공정 기술을 이용한 ESD 보호회로를 제안하였다. 제안된 보호회로는 게이트-기판 바이어싱 기술을 이용하여 낮은 트리거 전압을 구현하였다. 시뮬레이션 결과는 일반적인 ggnmos의 트리거 전압(8.2V) 에 비해 고안된 소자의 트리거 전압은 4.1V 으로 더 낮은 트리거 전압 특성을 나타냈다.

Keywords

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