개인용 정보 단말장치를 위한 내장형 멀티스레딩 프로세서 구조

Embedded Multithreading Processor Architecture for Personal Information Devices

  • 정하영 (연세대학교 전기전자공학과) ;
  • 정원영 (연세대학교 전기전자공학과) ;
  • 이용석 (연세대학교 전기전자공학과)
  • Jeong, Ha-Young (School of Electrical & Electronic Engineering, Yonsei University) ;
  • Chung, Won-Young (School of Electrical & Electronic Engineering, Yonsei University) ;
  • Lee, Yong-Surk (School of Electrical & Electronic Engineering, Yonsei University)
  • 투고 : 2010.07.21
  • 발행 : 2010.09.25

초록

본 논문은 스마트폰, 타블렛 PC와 같은 개인용 정보 단말장치 응용에 적합한 프로세서 구조를 제안한다. 고성능 내장형 프로세서 개발은 아키텍쳐의 변화가 필요하고, 오버헤드가 크기 때문에, 업계에서는 높은 동작 주파수의 고성능 내장형 프로세서의 개발에 전념하고 있다. 고성능 프로세서 구조 중 비순차 슈퍼스칼라(out-of-order superscalar)는 하드웨어 복잡도가 과도하게 증가하며, 그에 비해 성능 향상이 적으므로 내장형 응용에 적합하지 않다. 따라서 하드웨어 복잡도가 낮은 고성능 내장형 프로세서 구조의 개발이 필요하다. 본 논문에서는 스칼라, 슈퍼스칼라, 멀티프로세서 방식에 비하여 복잡도가 낮은 새로운 SMT(Simultaneous Multi-Threading) 구조를 제안한다. 최근의 개인용 정보단말기는 많은 작업을 동시에 수행하기 때문에, SMT나 CMP는 이에 적합한 구조라 할 수 있다. 또한, 시뮬레이션 결과 SMT는 여러 프로세서 구조 중 가장 효율이 높은 프로세서로 보인다.

In this paper, we proposed a processor architecture that is suitable for next generation embedded applications, especially for personal information devices such as smart phones, tablet PC. Latest high performance embedded processors are developed to achieve high clock speed. Because increasing performance makes design more difficult and induces large overhead, architectural evolution in embedded processor field is necessary. Among more enhanced processor types, out-of-order superscalar cannot be a candidate for embedded applications due to its excessive complexity and relatively low performance gain compared to its overhead. Therefore, new architecture with moderate complexity must be designed. In this paper, we developed a low-cost SMT architecture model and compared its performance to other architectures including scalar, superscalar and multiprocessor. Because current personal information devices have a tendency to execute multiple tasks simultaneously, SMT or CMP can be a good choice. And our simulation result shows that the efficiency of SMT is the best among the architectures considered.

키워드

참고문헌

  1. "The ARM Cortex-A9 Processors", ARM Ltd., 2009.
  2. U. Brinkschulte , C. Krakowski , J. Kreuzinger , Th. Ungerer, "A Multithreaded Java Microcontroller for Thread-Oriented Real-Time Event Handling," Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, p.34, October 12-16, 1999.
  3. J. Kreuzinger, A. Schulz, M. Pfeffer, T. Ungerer, U. Brinkschulte, C. Krakowski. "Real-time scheduling on multithreaded processors," the proceedings of seventh international conference on Real-Time Systems and Applications, pp. 155, 2000.
  4. J. Shin, K. Tam, D. Huang, B. Petrick, H. Pham, C. Hwang, H. Li, A. Smith, T. Johnson, F. Schumacher, D. Greenhill, A. Leon, A. Strong. "A 40nm 16-Core 128-Thread CMT SPARC SoC Processor". ISSCC 2010.
  5. Dean M. Tullsen, Susan J. Eggers, and Henry M. Levy, "Simultaenous Multithreading: Maximizing On-Chip Parallelism," Proceedings of 22nd Annual International Symposium on Computer Architecture, pp. 392-403, Santa Margherita Ligure, Italy, May 1995.
  6. Keith Diefendorff, "Compaq Chooses SMT for Alpha," Microprocessor Report, December 6, 1999.
  7. Patrick Crowley, Marc E. Fiuczynski Jean Loup Baer, and Brian N. Bershad, "Characterizing Processor Architectures for Programmable Network Interfaces," Proceedings of the 2000 International Conference on Supercomputing, May 2000.
  8. Peter N. Glaskowsky, "Networking Gets XStream," Microprocessor Report, November 13, 2000.
  9. Dean M. Tullsen, Susan J. Eggers, Joel S. Emer, and Henry M. Levy, "Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor," Proceedings of 23rd Annual International Symposium on Computer Architecture,pp. 191-202, Philadelphia, Pennsylvania, May 1996.
  10. Byung In Moon, Moon Gyung Kim, In Pyo Hong, Ki Chang Kim, and Yong Surk Lee, "Study of an In-order SMT Architecture and Grouping Schemes," International Journal of Control, Automation, and Systems, Volume 1, Number 3, pp.339-350, September 2003.
  11. SimpleScalar Version 4.0 Test Releases, SimpleScalarLLC, http://www.simplescalar.com/v4test.html
  12. Matthew R. Guthaus, Jeffrey S. Ringenberg, Dan Ernst, Todd M. Austin, Trevor Mudge, Richard B. Brown, "MiBench: A free, commercially representative embedded benchmark suite," IEEE 4th Annual Workshop on Workload Characterization, Austin, Texas, December 2001.