DOI QR코드

DOI QR Code

A SoC based on the Gaussian Pyramid (GP) for Embedded image Applications

임베디드 영상 응용을 위한 GP_SoC

  • 이봉규 (제주대학교 전산통계학과)
  • Published : 2010.03.01

Abstract

This paper presents a System-On-a-chip (SoC) for embedded image processing and pattern recognition applications that need Gaussian Pyramid structure. The system is fully implemented into Field-Programmable Gate Array (FPGA) based on the prototyping platform. The SoC consists of embedded processor core and a hardware accelerator for Gaussian Pyramid construction. The performance of the implementation is benchmarked against software implementations on different platforms.

Keywords

References

  1. J. Yang, X. Chen, W. Kunz, "A PDA-based Face Recognition System", Proceedings of WACV 2002, 2002.
  2. Jong Bae Kim, "A personal identity annotation overlay system using a wearable computer for augmented reality," IEEE Transactions on Consumer Electronics, vol. 49, no. 4, pp. 1457-1467, Nov., 2003. https://doi.org/10.1109/TCE.2003.1261254
  3. H. Nakajima, Y. Matsuo, M. Nagata and K. Saito, "Portable Translator capable of Recognizing Characters on Signboard and Menu Captured by built-in camera," Proc. of the ACL Interactive Poster and Demonstration Sessions, pp. 61 – 64, June, 2005.
  4. A. Greaves, A. Hang and E. Rukzio, "Picture Browsing and Map Interaction using a Projector Phone," Proceeding of MobileHCI 2008, pp. 527-530, Amsterdam, the Netherlands, 2008.
  5. P. J. Burt and E. H. Adelson, "The Laplacian pyramid as a compact image code," IEEE Transactions on communications, vol. 31, no.4, pp. 532 – 540, April, 1983.
  6. P. G.. D. Valle, D. Atienza, G. Paci and F. Poletti, "Application of FPGA Emulation to SoC Floorplan and Packaging Exploration," XXII Conference on Design of Circuits and Integrated System, pp. 236 -240.
  7. LEON2 processor user's manual, Gaisler Research, http://www.gaisler.com
  8. B. Blair and C. Murphy, "Difference of Gaussian Scale-Space Pyramids for SIFT Feature Detection," Complex Digital Systems Design, Final report, 2007.
  9. O. Sims and J. Irvine, "An FPGA implementation of pattern-selective pyramidal image fusion," Proceedings of 2006 international conference of field programmable logic and application, Mardrid, Spain, August 2006.
  10. Theocharides, G. Link, N.Vijaykrishnan, M. J. Irwin and W. Wolf, "Embedded Hardware Face Detection", Proceedings of the 17th International Conferenceon VLSI Design (VLSID'04), Jan., 2004.
  11. N. Petterson and L. Petterson, "Online stereo calibration using FPGAs," IEEE Proceedings of Intelligent vehicles symposium, 2005.
  12. A. Darabiha, W. J. MacLean and J. Rose, "Reconfigurable hardware implementation of a phase-correlation stereo algorithm," Machine Vision and Applications, vol. 17, no. 2, pp. 116 – 132, 2006. https://doi.org/10.1007/s00138-006-0018-2
  13. MT9V112 manual, Micron Technology Inc., http://www.micron.com