성능 모니터링 이벤트들의 통계적 분석에 기반한 모바일 프로세서의 전력 예측

Power Prediction of Mobile Processors based on Statistical Analysis of Performance Monitoring Events

  • 윤희성 (순천향대학교 컴퓨터학부) ;
  • 이상정 (순천향대학교 컴퓨터학부)
  • 발행 : 2009.07.15

초록

제한된 용량의 배터리로 동작해야 하는 모바일 시스템에서는 소프트웨어 설계시 성능뿐만 아니라 전력소모도 고려해야 한다. 따라서 소프트웨어의 실행 중에 전력소모를 정확하게 예측할 수 있으면 전력과 성능을 고려한 효율적인 소프트웨어의 설계가 가능해진다. 본 논문에서는 모바일 프로세서의 전력소모 예측을 위해 정량적으로 프로세서의 동작을 분석하고 모델링 하는 통계적인 분석 방법을 제안한다. 제안된 방식은 다양한 벤치마크 프로그램들을 실행하여 프로세서의 성능 모니터링 이벤트들과 전력소모 데이터를 수집한 후 계층적 클러스터링(hierarchical clustering) 분석 등을 적용하여 서로 중복되지 않으면서 전력소모에 크게 기여하는 대표적인 성능 모니터링 이벤트들을 추출한다. 전력 예측 모델은 선택된 성능 모니터링 이벤트들이 독립변수가 되고 전력소모가 종속변수가 되는 회귀분석(regression analysis)을 수행하여 개발한다. 전력 예측 모델은 Intel XScale 아키텍처 기반의 PXA320 모바일 프로세서에 적용하여 평균 4% 이내의 에러율로 전력소모를 예측할 수 있음을 보인다.

In mobile systems, energy efficiency is critical to extend battery life. Therefore, power consumption should be taken into account to develop software in addition to performance, Efficient software design in power and performance is possible if accurate power prediction is accomplished during the execution of software, In this paper, power estimation model is developed using statistical analysis, The proposed model analyzes processor behavior Quantitatively using the data of performance monitoring events and power consumption collected by executing various benchmark programs, And then representative hardware events on power consumption are selected using hierarchical clustering, The power prediction model is established by regression analysis in which the selected events are independent variables and power is a response variable, The proposed model is applied to a PXA320 mobile processor based on Intel XScale architecture and shows average estimation error within 4% of the actual measured power consumption of the processor.

키워드

참고문헌

  1. B. Sprunt, “Basics of Performance-Monitoring Hardware,” IEEE Micro, vol.22, Issue 4, pp.64-71, July-August, 2002 https://doi.org/10.1109/MM.2002.1028477
  2. G. Contreras and M. Martonosi, "Power Prediction for Intel XScale Processors Using Performance Monitoring Unit Events," Proc. int'l Symp. Low Power Electronics and Design (ISLPED'05), Aug. 2005 https://doi.org/10.1145/1077603.1077657
  3. K. Rajamani et al., “Application-Aware Power Management,” Proc. Int'l Symp. Workload Cha-racterization (IISWC '06), Oct. 2006 https://doi.org/10.1109/IISWC.2006.302728
  4. Q. Wu et al., “Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance,” Proc. Int'l Symp. Microarchitecture (MICRO '05), Nov. 2005 https://doi.org/10.1109/MICRO.2005.7
  5. C. Isci and M. Martonosi, “Phase Characterization for Power: Evaluating Control-Flow-Based and Event-Counter-Based Techniques,” Proc. Int'l Symp. High-Performance Computer Architecture (HPCA '06), Feb. 2006 https://doi.org/10.1109/HPCA.2006.1598119
  6. C. Isci, G. Contreras, and M. Martonosi, “Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management,” Proc. Int'l Symp. Microarchitecture (MICRO '06), Dec. 2006 https://doi.org/10.1109/MICRO.2006.30
  7. 3rd Generation Intel XScale${\circledR}$ Microarchitecture Developer's Manual, Intel, 2007
  8. Monahans P Processor System and Timer Confi-guration Developers Manual, Marvell, 2006
  9. M. Guthaus et al., “MiBench: A Free, Commercially Representative Embedded Benchmark Suite,” Proc. Annual Workshop on Workload Characterization, Dec. 2001 https://doi.org/10.1109/WWC.2001.15
  10. MiBench Version 1.0, http://www.eecs.umich.edu/mibench/
  11. Standard Performance Evaluation Corportation (SPEC), http://spec.org/
  12. H. Sasaki, Y. Ikeda, M. Kondo and H. Nakamura, “An Intra-Task DVFS Technique based on Sta-tistical Analysis of Hardware Events” Proc. Int'l Conf. Computing Frontiers, May 2007 https://doi.org/10.1145/1242531.1242551
  13. S. Lee, H. Lee and P. Yew, “Runtime Perfomance Projection Model for Dynamic Power Manage-ment,” Proc. Asaia-Pacfic Computer Systems Architecture Conference (ACSAC '07), pp.186-l97, Aug. 2007
  14. B. Lee and D. Brooks, “Accurate and Efficient Regression Modeling for Microarchitectural Perfor-mance and Power Prediction," Proc. Int'l Conf. Architectural Support for Programming Languages and Operating Systems (ASPLOS '06), Oct, 2006 https://doi.org/10.1145/1168857.1168881
  15. B. Lee. and David M. Brooks, "Spatial Sampling and Regression," IEEE Micro, vol.7, Issue 3, pp.74-93, May-June 2007 https://doi.org/10.1109/MM.2007.61
  16. W. Mathur and J. Cook, “Improved Estimation for Software Multiplexing of Performance Counters,” Proceedings of the 13th IEEE International Sympo-sium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, 2005 https://doi.org/10.1109/MASCOTS.2005.34
  17. R Project for Statistical Computing, http://www.r-project.org/
  18. MICROVISION, http://mvtool.co.kr
  19. G. Fursin et al., "MiDataSets: Creating The Con-ditions For A More Realistic Evaluation of Ite-rative Optimization," Proc. Int'l Conf. High Perfor-mance Embedded Architectures & Compilers (HiPEAC '07), Jan. 2007
  20. MiDataSets for MiBench, http://midatasets.source-forge.net/
  21. National Instruments LabVIEW, http://www.ni.com/labview