A Garbage Collection Method for Flash Memory Based on Block-level Buffer Management Policy

  • Li, Liangbo (Department of Computer Science & Information engineering, INHA University) ;
  • Shin, Song-Sun (Department of Computer Science & Information engineering, INHA University) ;
  • Li, Yan (Department of Computer Science & Information engineering, INHA University) ;
  • Baek, Sung-Ha (Department of Computer Science & Information engineering, INHA University) ;
  • Bae, Hae-Young (Department of Computer Science & Information engineering, INHA University)
  • 발행 : 2009.12.30

초록

Flash memory has become the most important storage media in mobile devices along with its attractive features such as low power consumption, small size, light weight, and shock resistance. However, a flash memory can not be written before erased because of its erase-before-write characteristic, which lead to some garbage collection when there is not enough space to use. In this paper, we propose a novel garbage collection scheme, called block-level buffer garbage collection. When it is need to do merge operation during garbage collection, the proposed scheme does not merge the data block and corresponding log block but also search the block-level buffer to find the corresponding block which will be written to flash memory in the next future, and then decide whether merge it in advance or not. Our experimental results show that the proposed technique improves the flash performance up to 4.6% by reducing the unnecessary block erase numbers and page copy numbers.

키워드

참고문헌

  1. D.B. Lomet, "Bulletin of the Technical Committee on Data Engineering," IEEE Computer Society, Vol. 30, No. 3, Sep. 2007.
  2. E. Gal and S. Toledo, "Algorithms and data structures for flash memories, ACM Computing Surveys, 2005.
  3. S.W. Lee, D.J. Park, T.S. Chung, D.H. Lee, S.W. Park and H.J. Song, "A log buffer-based flash translation layer using fully-associative sector translation," ACM Transactions on Embedded Computing Systems, Vol. 6, No.3, 2007.
  4. C. Park, W.M. Cheon, J.G. Kang, K.G. Roh, W.H. Cho and J.S. Kim, "A reconfigurable FTL architecture for NAND flash-based applications," ACM Transactions on Embedded Computing Systems, Vol. 7, No. 4, 2008.
  5. J.U. Kang, H.S. Jo, J.S. Kim, and J.W. Lee, "A super block-based flash translation layer for NAND flash memory," International Conference On Embedded Software, pp. 161-170, 2006.
  6. J. Kang, J.M. Kim, S.H. Noh, S.L. Min and Y. Cho, "A space-efficient flash translation layer for compact flash systems," IEEE Transactions on Consumer Electronics, Vol. 48, No.2, pp. 366-375, 2006. https://doi.org/10.1109/TCE.2002.1010143
  7. S.Y. Park, D.W. Jung, J.D. Kang, J.S. Kimand J.W. Lee, "CFLRU: a replacement algorithm for flash memory," International Conference on Compilers, Architecture and Synthesis for Embedded Systems, pp. 234-241, 2006.
  8. H. Kim, and S.J. Ahn, "BPLRU: a buffer man agement scheme for improving random writes in flash storage," Proceedings of the 6th USENIX Conference on File and Storage Technologies, 2008.
  9. H. Jo, J.U. Kang, J.S. Kim, and J. Lee, "FAB: Flash-aware buffer management policy for portable media players," IEEE Transactions on Consumer Electronics, Vol. 52, No.2, pp.485-493, 2006. https://doi.org/10.1109/TCE.2006.1649669
  10. L.P. Chang and T.W. Kuo, "An efficient management scheme for large-scale flash-memory storage systems," Symposium on Applied Computing, pages 862-868, 2004.
  11. K.H. Parkand S.H. Lim, "An Efficient NAND flash file system for flash memory storage," IEEE Transactions on Computers, Vol. 55, pages 906-912, 2006. https://doi.org/10.1109/TC.2006.96
  12. Intel Corporation, ,"Understanding the Flash Translation Layer (FTL) Specification," White Paper, http://www.embeddedfreebsd.org/Documents/Intel-FTL.pdf, 1998.