Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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C-V Characterization of Plasma Etch-damage Effect on (100) SOI

Plasma Etch Damage가 (100) SOI에 미치는 영향의 C-V 특성 분석

  • 조영득 (광운대학교 전자재료공학과) ;
  • 김지홍 (고려대학교 전자공학과) ;
  • 조대형 (고려대학교 전자공학과) ;
  • 문병무 (고려대학교 전자공학과) ;
  • 조원주 (광운대학교 전자재료공학과) ;
  • 정홍배 (광운대학교 전자재료공학과) ;
  • 구상모 (광운대학교 전자재료공학과)
  • Published : 2008.08.01
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Abstract

Metal-oxide-semiconductor (MOS) capacitors were fabricated to investigate the plasma damage caused by reactive ion etching (RIE) on (100) oriented silicon-on-insulator (SOI) substrates. The thickness of the top-gate oxide, SOI, and buried oxide layers were 10 nm, 50 nm, and 100 nm, respectively. The MOS/SOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching. The measured C-V curves were compared to the numerical results from corresponding 2-dimensional (2-D) structures by using a Silvaco Atlas simulator.

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References

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