Study on OTFT-Backplane for Electrophoretic Display Panel

전기영동 디스플레이 패널용 OTFT-하판 제작 연구

  • Lee, Myung-Won (Dept. of Electronic Eng., Media Device Lab., Dong-A University) ;
  • Ryu, Gi-Sung (Dept. of Electronic Eng., Media Device Lab., Dong-A University) ;
  • Song, Chung-Kun (Dept. of Electronic Eng., Dong-A University)
  • 이명원 (동아대학교 전자공학과(미디어디바이스 연구센터)) ;
  • 류기성 (동아대학교 전자공학과(미디어디바이스 연구센터)) ;
  • 송정근 (동아대학교 전자공학과)
  • Published : 2008.07.25

Abstract

We fabricated flexible electrophoretic display(EPD) driven by organic thin film transistors(OTFTs) on plastic substrate. We designed the W/L of OTFT to be 15, considering EPD's transient characteristics. The OTFTs employed bottom contact structure and used Al for gate electrode, the cross-linked polyvinylphenol for gate insulator, pentacene for active layer. The plastic substrate was coated by PVP barrier layer in order to remove the islands which were formed after pre-shrinkage process and caused the electrical short between bottom scan and top data metal lines. Pentacene active layer was confined within the gate electrodes so that the off current was controlled and reduced by gate electrodes. Especially, PVA/Acryl double layers were inserted between EPD panel and OTFT-backplane in order to protect OTFT-backplane from the damages created by lamination process of EPD panel on the backplane and also accommodate pixel electrodes through via holes. From the OTFT-backplane the mobility was $0.21cm^2/V.s$, Ion/Ioff current ratio $10^5$. The OTFT-EPD panel worked successfully and demonstrated to display some patterns.

본 논문에서는 플라스틱 기판에 OTFT를 스위칭 소자로 사용하여 유연한 EPD 패널을 제작하였다. OTFT의 채널 폭과 길이의 비(W/L)는 EPD의 응답속도를 고려하여 15이상으로 설계를 하였다. 게이트전극은 Al, 절연층은 cross-linked PVP, 반도체층은 펜타센, 중간층은 PVA/Acryl를 사용하였다. 플라스틱 기판은 보호층 처리를 통하여 열처리 공정 시 발생하는 입자를 제거하였고, 거친 표면을 평탄화하였다. 반도체층의 크기는 게이트 전극 보다 작도록 제한하여 누설전류를 줄일 수 있었다. EPD-상판과 OTFT-하판 사이에 픽셀전극을 삽입하고 또한 OTFT-하판을 보호하기 위하여 PVA/Acryl로 구성된 중간층을 상빙하였다. 완성된 OTFT-하판에서 OTFT의 이동도는 $0.21cm^2/V.s$, 전류점멸비(Ion/Ioff)는 $10^5$ 이상의 성능을 보였다.

Keywords

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