The Journal of Korean Institute of Communications and Information Sciences (한국통신학회논문지)

The Korean Institute of Commucations and Information Sciences (한국통신학회)
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A Low Complexity and A Low Latency Systolic Arrays for Multiplication in GF($2^m$) Using An Optimal Normal Basis of Type II

타입 II ONB를 이용한 GF($2^m$)상의 곱셈에 대한 낮은 복잡도와 작은 지연시간을 가지는 시스톨릭 어레이

  • Published : 2008.01.31
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Abstract

Using the self duality of an optimal normal basis(ONB) of type II, we present a bit parallel and bit serial systolic arrays over GF($2^m$) which has a low hardware complexity and a low latency. We show that our multiplier has a latency m+1 and the basic cell of our circuit design needs 5 latches(flip-flops). Comparing with other arrays of the same kinds, we find that our array has significantly reduced latency and hardware complexity.

타입 II ONB(optimal normal basis)의 자기쌍대성(self duality)을 이용하여 낮은 하드웨어 복잡도와 작은 지연시간을 가지는 GF($2^m$)상의 비트 패러럴, 시리얼 시스톨릭 어레이를 제안하였다. 제안된 곱셈기는 m+1의 지연시간을 가지며 각 셀은 5개의 래치(플립-플롭)로 구성된다. 제안된 어레이는 다른 어레이와 비교하여 공간 복잡도와 지연시간을 줄임을 알 수 있다.

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