DOI QR코드

DOI QR Code

A Partition Technique of UML-based Software Models for Multi-Processor Embedded Systems

멀티프로세서용 임베디드 시스템을 위한 UML 기반 소프트웨어 모델의 분할 기법

  • Published : 2008.02.29

Abstract

In company with the demand of powerful processing units for embedded systems, the method to develop embedded software is also required to support the demand in new approach. In order to improve the resource utilization and system performance, software modeling techniques have to consider the features of hardware architecture. This paper proposes a partitioning technique of UML-based software models, which focus the generation of the allocatable software components into multiprocessor architecture. Our partitioning technique, at first, transforms UML models to CBCFGs(Constraint-Based Control Flow Graphs), and then slices the CBCFGs with consideration of parallelism and data dependency. We believe that our proposition gives practical applicability in the areas of platform specific modeling and performance estimation in model-driven embedded software development.

임베디드 시스템의 하드웨어 구성요소들에 대한 성능 고도화가 요구됨에 따라 이에 탑재될 소프트웨어의 개발 방법도 영향을 받고 있다. 특히 MPSoC와 같은 고가의 하드웨어 아키텍처에서는 효율적인 자원의 사용 및 성능의 향상을 위해 소프트웨어 측면에서의 고려가 필수적으로 요구된다. 따라서 본 연구에서는 임베디드 소프트웨어 개발과정에서 멀티프로세서 기반의 하드웨어 아키텍처를 고려하는 소프트웨어 태스크의 분할기법을 제시한다. 제시하는 기법은 UML 기반의 소프트웨어 모델을 CBCFG (Constraints-Based Control Flow Graph)로 변환하고, 이를 병렬성과 데이터 의존성을 고려한 소프트웨어 컴포넌트로 분할하는 기법이다. 이러한 기법은 임베디드 소프트웨어의 플랫폼 의존적인 모델 개발과 태스크 성능 예측 등을 위한 자료로 활용할 수 있다.

Keywords

References

  1. B. Horowitz, et. al., 'Platform-Based Embedded Software Design and System Integration for Autonomous Vehicles,' Proceedings of the IEEE, Vol.19, No.1, pp.198-211, Jan. 2003 https://doi.org/10.1109/JPROC.2002.805827
  2. 김우열, 김영철, '확장된 xUML을 사용한 MDA 기반 이종 임베디드 소프트웨어의 컴포넌트 모델링에 관한 연구,' 정보처리학회논문지D, Vol.14-D, No.1, pp.83-88, 2007년 2월 https://doi.org/10.3745/KIPSTD.2007.14-D.1.083
  3. A. Jerraya, and W. Wolf, 'Multiprocessor Systems-on-Chip', Morgan Kaufmann, Sep., 2004
  4. Giovanni De Micheli, 'MPSoc HW Challenges - Reliability and Reliable Design,' Tutorial of MPSoC'05, France, July, 2005
  5. OMG, 'UML 2.0 Superstructure Specification', Doc #ptc-04-10-20, Oct., 2004
  6. W. Plishker, et. al., 'Automated Task Allocation on Single Chip, Hardware Multithreaded Multiprocessor Systems,' Workshop on Embedded Parallel Architecture(WEPA-1), pp.14-20, Feb., 2004
  7. T.S. Dahl, et. al, 'Scheduling with Group Dynamics: a Multiple-Robot Task Allocation Algorithm based on Vacancy Chains,' Technical Report CRES-002-07, Center for Robotics and Embedded Systems, Univ. of Southern California, 2002
  8. P.G. Paulin, et. al., 'Parallel Programming Models for Multi-Processor SoC Platform Applied to High-Speed Traffic Management,' The Proceedings of CODES'04, pp.48-53, Sep., 2004
  9. V. Garousi, L. Briand, and Y. Labiche, 'Control Flow Analysis of UML 2.0 Sequence Diagrams,' Carleton University TR SCE-05-09, Sept., 2005 https://doi.org/10.1007/11581741_13
  10. H. Storrle, 'Semantics of Control-Flow in UML 2.0 Activities,' Proceedings of IEEE VLHCC'04, pp.235-242, Sept., 2004
  11. P. Blasio, K. Fisher, and C. Talcott, 'A Control-Flow Analysis for a Calculus of Concurrent Object,' IEEE TSE, Vol.26, No.7, pp.617-634, July, 2000
  12. J. Zhao, 'Control-Flow Analysis and Representation for Aspect-Oriented Programs,' Proceedings of QSIC'06, Beijing Chian, pp.38-48, Oct., 2006
  13. H. Hollstein, et. al., 'HiPART: A New Hierarchical Semi-Interactive HW/SW Partitioning Approach with Fast Debugging for Real-Time Embedded Systems,' Proceedings of the CODES'98, pp.29-33, USA, Mar, 1998
  14. G. Vanmeerbeek, et. al., 'Hardware/Software Partitioning of Embedded System in OCAPI-xl, Proceedingd of CODES'01, Denmark, pp.30-35, 2001
  15. H. Cornelis and E.D. Schutter, 'Neurospaces: Towards Automated Model Partitioning for Parallel Computers,' Journal of Neurocomputing, Vol.70, pp.2117-2121, 2007 https://doi.org/10.1016/j.neucom.2006.10.140
  16. K. Hering, G.Runger, and S. Trautmann, 'Modular Construction of Model Partitioning Process for Parallel Logic Simulation,' Parallel Processing Workshop, 2001, pp.99-105, Sept. 2001
  17. N. Li, Y. J. Fang, 'Software/hardware Patition in Multiple Processors Embedded System,' Proceedings of 4th ICMLC'05, pp.165-170, Aug., 2005
  18. H. Gomaa, 'Designing Concurrent, Distributedm and Real-Time Applications with UML', Addison-Wesley, 2000
  19. B. P. Douglass, 'Real Time UML', 3rd ed., Addison-Wesley, 2004
  20. B. P. Douglass, 'Real-Time UML Workshop for Embedded Systems', Newnes, 2007
  21. Jang-Eui Hong and Doo-Hwan Bae, 'MDA-Based Embedded Software Development for Multiprocessor Architecture,' Communications of KISS, Vol.24, No.8, pp.19-25, 2006
  22. K. Kyriakopoulos and K. Psarris, 'Data Dependence Analysis for Complex Loop Regions,' pp.195-204, Proceedings of Parallel Processing, pp.195-204, Sept., 2001
  23. T. Jacobson and G. Stubbendieck, 'Dependency Analysis for For-Loop Structures for Automatic Parallelization of C Code,' Proceedings of the MICS 2003, Duluth, April, 2003
  24. Symbian, 'Symbian OS Ver 9.1 Product description', Revision 1.1, Feb., 2005