Research on the Performance Test of System in Package Chips for the Digital Broadcasting Receiver

디지털 방송 수신용 System in Package 칩의 성능 검사에 관한 연구

  • 김지균 (명지대 공대 전기공학과) ;
  • 이헌용 (명지대 공대 전기공학과)
  • Published : 2008.12.01

Abstract

This research paper aims to establish a test process of the AFE SiP chip. It measured the sensitivity, current consumption and power consumption both on the evaluation socket board and Catalyst load board. As a result, the sensitivity became deteriorated with an average of 0.2[dBm] at the channel 62 only, the current consumption increased to an average of 0.57[mA] and the power consumption increased to an average of 1.76[mW], But all characteristics incomes the tolerance of the measurement, it also keeps almost the same level. Therefore this design of the test process improved a valid design.

Keywords

References

  1. Christopher M. Scanlan and Nazad Karim, ""System-in-Package technology, application and trends?"", SMTA International Proceedings, pp. 764-773, 2001.
  2. 이성수, "SiP'(Systern-in Package) 기술", 주간기술동향, Vol. 242, pp. 25-33, 2006. 4.
  3. 윤종광, "SOP(System-on-Packaging) for Mega-Function System Integration", 세라미스트, Vol. 8, No. 6, pp. 46-52, 2005. 12
  4. Andrew Holland, "Innovations in QFN Packaging Targeting RF and Image Sensor System-in-Package", IMAPS MicroTech 2006
  5. Wei Koh, "System in Package (SiP) Technology Applications", IEEE Electronic Packaging Technology Conference, pp. 61-66, 2005. 8
  6. Shan Gao, Jupyo Hong 외 3인, "Effects of Packaging Materials on the Reliability of System in Package", IEEE/ICEPT Electronic Packaging Technology Conference, pp. 1-5, 2007. 8
  7. Tiao Zhou, Mark Gerber, Moody Dreiza, "Stacked Die Package Design Guidelines", IMAPS 2004
  8. Priest, J., Ahmad, M.외 3인, "Feasibility Study of a SiP for High Performance and Reliability Product Application", IEEE High Density Microsystem Design and Packaging and Component Failure Analysis Conference, pp. 1-5, 2005. 7
  9. Fujitsu, "Development of System in Package Using Simulation Technologies", FIND, Vol. 23, No.1, pp. 3-8, 2005. 2
  10. 서기복, "Test 관점에서 본 Analog Front-End SiP의 I/O Pad 설계 및 BER Test 제안", IT SoC magazine, Vol. 14, pp. 37-42, 2007. 7.