ETRI Journal
- Volume 29 Issue 3
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- Pages.408-410
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- 2007
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- 1225-6463(pISSN)
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- 2233-7326(eISSN)
A 9-Bit 80-MS/s CMOS Pipelined Folding A/D Converter with an Offset Canceling Technique
- Lee, Seung-Chul (IT Convergence & Components Laboratory, ETRI) ;
- Jeon, Young-Deuk (IT Convergence & Components Laboratory, ETRI) ;
- Kwon, Jong-Kee (IT Convergence & Components Laboratory, ETRI)
- Received : 2006.09.19
- Published : 2007.06.30
Abstract
A 9-bit 80-MS/s CMOS pipelined folding analog-to-digital converter employing offset-canceled preamplifiers and a subranging scheme is proposed to extend the resolution of a folding architecture. A fully differential dc-decoupled structure achieves high linearity in circuit design. The measured differential nonlinearity and integral nonlinearity of the prototype are