The Transactions of The Korean Institute of Electrical Engineers (전기학회논문지)

The Korean Institute of Electrical Engineers (대한전기학회)
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A New Two-Level Index Mapping Scheme for Pipelined Implementation of Multidimensional DFT

새로운 이중 색인 사상에 의한 다차원 DFT의 파이프라인 구조 개발

  • Published : 2007.04.01
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Abstract

This paper presents a new index mapping method for DFT (Discrete Fourier Transform) and its application to multidimensional DFT. Unlike conventional index mapping methods such as DIT (Decimation in Time) or DIF (Decimation in Frequency) algorithms, the proposed method is based on two levels of decomposition and it can be very efficiently used for implementing multidimensional DFT as well as 1-dimensional DFT. The proposed pipelined architecture for multidimensional DFT is very flexible so that it can lead to the best tradeoff between performance and hardware requirements. Also, it can be easily extended to higher dimensional DFTs since the number of CEs (Computational Elements) and DCs (Delay Commutators) increase only linearly with the dimension. Various implementation options based on different radices and different pipelining depths will be presented.

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References

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