Journal of the Institute of Electronics Engineers of Korea TC (대한전자공학회논문지TC)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A study on Parallel Interference Cancellation scheme based sorting method for a Multi-carrier DS/CDMA System

MC-DS/CDMA 시스템에서 정렬기법을 이용한 병렬형 간섭제거기법의 성능개선에 관한 연구

  • Park Jae-Won (Department of Information and Communication, Yeungnam University) ;
  • Park Yong-Wan (Department of Information and Communication, Yeungnam University)
  • 박재원 (영남대학교 정보통신공학과) ;
  • 박용완 (영남대학교 정보통신공학과)
  • Published : 2005.01.01
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Abstract

In this paper, we introduce a Parallel Interference Canceller (PIC) based sorting method to improve performance in the MC-DS/CDMA environment. A conventional PIC estimates and subtracts out all of the MAI (Multiple Access Interference) for each user in parallel. The parallel process ensures the low delay for the detection of all users. Also this scheme requires more stages for having better performance. Since the performance of PIC is strongly related to the correct MAI estimation, we introduce the IC (Interference Cancellation) scheme to estimate the accurate weaker signal group than the desired signal using conventional PIC. The principle of the proposed receiver sorts in descending order by the strength of signal and subtracts the MAI of the strong interferers from the desired signal for the accurate estimate of the weaker signals. Following this, the proposed scheme cancels out the improved weaker interference from the desired signal, using the output of the pre-step. In this result, the proposed system obtains better BER performance than the conventional PIC because the accuracy of the strong signal is improved. However, a disadvantage exists in that the processing time has slightly longer delay than the PIC owing to the power sorting and the MAI estimation process. The system performance evaluates and compares other non-liner It according to the number of sub-carriers in the limited-bandwidth.

이 논문은 다중반송파 직접수열 코드분할 다중접속 (MC-DS/CDMA) 시스템 환경에서 성능향상을 위한 병렬형 간섭제거시스템 (Parallel Interference Canceller: PIC)을 소개한다. 기존의 병렬형 간섭제거 방식은 다중접속간섭을 원하는 신호에서 동시에 제거하는 기법으로 처리시간이 매우 빠르지만, 원하는 성능을 얻기 위해서 다단으로 시스템을 구성해야만 한다. 기존 방식의 성능은 정확한 간섭추정과 매우 밀접한 관계가 있으므로, 우리는 원하는 신호보다 작은 간섭신호 그룹을 좀 더 정확하게 추정하여 성능을 개선시킨 간섭제거 방식을 소개한다. 제안된 수신기의 동작원리는 수신된 신호를 크기에 따라 내림차순 정렬을 하고, 작은 신호들을 정확하게 추정하기 위하여 원하는 신호에서 큰 간섭신호를 제거한다. 다음으로 전 단계에서 개선된 작은 간섭신호들을 원하는 신호에서 제거한다. 이 결과, 큰 신호들의 정확성이 보장되므로 제안 방식은 기존의 병렬형 간섭제거 시스템보다 전반적인 비트 에러율 (Bit Error Ratio)성능이 향상된다. 단점으로 전력 정렬과 간섭추정 단계가 요구되므로 기존시스템보다 처리시간이 조금 지연된다. 성능은 한정된 대역 내에서 부반송파의 증가에 따라 다른 비선형 간섭제거 시스템과 비교 분석하였다.

Keywords

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