IPsec Security Server Performance Analysis Model

IPSec보안서버의 성능분석 모델

  • 윤연상 (충북대학교 정보통신공학과) ;
  • 이선영 (충북대학교 정보통신공학과) ;
  • 박진섭 (충북대학교 정보통신공학과) ;
  • 권순열 (충북대학교 정보통신공학과) ;
  • 김용대 (충북대학교 정보통신공학과) ;
  • 양상운 (ETRI 부설 국가보안기술연구소) ;
  • 장태주 (ETRI 부설 국가보안기술연구소) ;
  • 유영갑 (충북대학교 정보통신공학과)
  • Published : 2004.09.01

Abstract

This paper proposes a performance analysis model of security servers comprising IPSec accelerators. The proposed model is based on a M/M1 queueing system with traffic load of Poisson distribution. The decoding delay has been defined to cover parameters characterizing hardware of security sorrels. Decoding delay values of a commercial IPSec accelerator are extracted yielding less than 15% differences from measured data. The extracted data are used to simulate the server system with the proposed model. The simulated performance of the cryptographic processor BCM5820 is around 75% of the published claimed level. The performance degradation of 3.125% and 14.28% are observed for 64byte packets and 1024byte packets, respectively.

본 논문에서는 IPSec 가속기를 보안서버에 장착하였을 경우의 성능분석모델을 제안하였다. 제안된 보안서버는 M/M/1 시스템으로 모델링하였으며 트래픽 로드는 포아송분포를 이용하였다 보안서버의 성능변수를 통합하여 디코딩지연이라고 정의하였으며 IPSec 가속기인 BCM5820의 실측 결과와 비교하여 15%정도의 차이를 갖는 디코딩지연을 추출하였다 디코딩 지연을 제안된 성능분석모델에 대입하여 시뮬레이션 하였을 경우 보안연결은 BCM5820의 발표된 성능의 75%의 처리량을 보였다. 그리고 데이터전달은 발표된 성능의 각각 3.125%(패킷크기 64byte), 14.28%(패킷크기 1024byte)의 처리량을 보였다.

Keywords

References

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