직렬형 멀티레벨 인버터를 사용한 대용량 무효전력 보상장치의 파라메타 설계

Design of Parameters for High Power Static Var Compensator Used Cascade Multilevel Inverter

  • 민완기 (조선이공대학 전기과) ;
  • 최재호 (충북대학교 전기전자공학부)
  • 투고 : 2003.07.30
  • 심사 : 2003.09.02
  • 발행 : 2003.12.01

초록

This paper examines the application of high voltage static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). This method has the primary advantage that the number of voltage levels can be increased for a given number of semiconductor devices when compared to the conventional control methods. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. From the mathematical model of the system, the design procedures of the circuit parameters L and C are presented in this thesis. To meet the specific total harmonic distortion(THD) and ripple factor of the capacitor voltage, the circuit parameters L and C are designed. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

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