The Transactions of the Korean Institute of Electrical Engineers C (대한전기학회논문지:전기물성ㆍ응용부문C)

The Korean Institute of Electrical Engineers (대한전기학회)
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The Algorithm for Calculating the Base-Collector Breakdown Voltage of NPN BJT for Integrated Circuits

직접회로용 NPN BJT의 베이스-컬렉터간 역방향 항복전압 추출 알고리즘

  • 이은구 (인하대학교 전자공학과) ;
  • 김철성 (인하대학교 전자공학과)
  • Published : 2003.02.01
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Abstract

The algorithm (or calculating the base-collector breakdown voltage of NPN BJT(Bipolar Junction Transistor) for integrated circuits is Proposed. The method for calculating the electric field using the solution of Poisson's equation is presented and the method for calculating the breakdown voltage using the integration of ionization coefficients is presented. The base-collector breakdown voltage of NPN BJT using 20V process obtained from the proposed method shows an averaged relative error of 8.0% compared with the measured data and the base-collector breakdown voltage of NPN BJT using 30V process shows an averaged relative error of 4.3% compared with the measured data

Keywords

References

  1. Paolo Antognetti, Power Integrated Circuits: Physics, Design, and Applications, McGraw-Hill Book Co., New York, pp. 10.1-10.38, 1986
  2. Samsung Electronics, Motor Driver IC, Samsung Electronics, 1999 Data Book, 1999
  3. Rohm, 3-Phase Motor Driver for CD-ROMs, Rohm Japan, 2001
  4. Alan Hastings, The Art of Analog Layout, Prentice Hall, pp.262-266, 2001
  5. B. J. Baliga, Power semiconductor devices, PWS publishing company, Boston, pp.66-90, 1996
  6. TMA, DAVINCI manual, Technology Modeling Associates, California, 1995
  7. P. Sonneveld, 'CGS, A Fast Lanczos-type Solver for nonsymmetric linear systems,' SIAM J. Sci. Stat. Comput., Vol.10, No.1, pp.36-62, 1989 https://doi.org/10.1137/0910004
  8. 김태한, 변형된 결합법을 이용한 혼합모드 소자-회로 시뮬레이터 구현에 관한 연구, 인하대학교 대학원 박사 논문, 1998
  9. 김태한, 이은구, 김철성, '우수한 수렴특성을 갖는 3차원 포아송 방정식의 이산화 방법', 대한전자공학회논문집 제34권 D편 제8호, pp.15-25,1997
  10. R. S. Muller, T. I. Kamins, Device electronics for Integrated Circuits, John Wiley & Sons, New York, pp.270-294, 1977
  11. S. Selberherr, Analysis and simulation of semiconductor devices, Springer-Verlag Wien New York, pp. 103-118, 1983
  12. TMA MEDICI Manual, Technology Modeling Associates, Inc., pp.2.35-2.37, pp.2.87-2.88, 1993
  13. P. Fleischmann, R. Sabelka, A.Stach, R.Strasser, and S. Selberherr, 'Grid generation for three-dimensional process and device simulation.',Simulation of Semiconductor Processes and Devices, pp.161-166, 1996
  14. 윤현민, 김태한, 김대영, 김철성, '3차원 정상상태의 드리프트-확산방정식의 해석 프로그램 개발', 대한전자공학회논문집 제34권 D편 제8호, pp.41-51,1997
  15. 대한전자공학회논문집 v.34 no.8 3차원 정상상태의 드리프트-확산방정식의 해석 프로그램 개발 윤현민;김태한;김대영;김철성