The 2-dimensional Discharge Cell Simulation for the Analysis of the Peset and Addressing of an Alternating Current Plasma Display Panel

  • Kim, Joong-Kyun (Plasma Laboratory, School of Electrical Engineering, Seoul National University) ;
  • Chung, Woo-Jun (Plasma Laboratory, School of Electrical Engineering, Seoul National University) ;
  • Seo, Jeong-Hyun (PDP division, Samsung SDI Co. Ltd.) ;
  • Whang, Ki-Woong (Plasma Laboratory, School of Electrical Engineering, Seoul National University)
  • 발행 : 2001.03.21

초록

The characteristics of the reset and the address discharges of an alternating current Plasma Display Panel (ac PDP) were studied using 2-dimensional numerical discharge cell simulation. We investigated the wall charge variations during the reset discharge adopting ramping reset pulse and the subsequent addressing discharge. The roles of the ramping reset scheme can be divided into two stages, each electrode gathers wall charges during ramping-up of the initial stage and the built-up wall charges are lost during ramping-down of the later stage. Address discharge does not only change the wall charge distributions on the address and the scan electrodes but also on the sustain electrode. The increase in the wall charges on the sustain electrode was observed with the variation of the applied voltage to the sustain electrode during the address period. The increase of the applied voltage to the sustain electrode during the address period is expected to induce the decrease of the sustain voltage during the display period.

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