참고문헌
- S.A.Mahlke, 'Exploiting Instruction Level Parallelism in the Presence of Conditional Branches,' Ph.D dissertation, Department of Electrical and Computer Engineering, University of Illinois. Urbana, IL, 1996
- T.Heil, Z.Smith, and J.Smith, 'Improving Branch Predictors by Correlating on Data Values,' Proceedings of the 32nd International Symposium Microarchitecture (MICRO-32), Nov. 1999 https://doi.org/10.1109/MICRO.1999.809440
- R.Rakvic, B.Black, and P.Shen, 'Completion Time Multiple Branch Prediction for Enhancing Trace Cache Performance,' Proceedings of the 27th Annual International Symposium on Computer Architecture (ISCA-27), June 2000 https://doi.org/10.1145/339647.339654
- K.Skadron, M.Martonosi, and D.Clark. 'Speculative Updates o[ Local and Global Branch History' A Quantitativc Analysis,' Journal of Instruction-Level Parallelism, vol.2, Jan. 2000
- T. Yeh and Y.Patt, 'Two-Level Adaptive Branch Prediction,' Proceedings of the 24th International Symposium microarchiteeture (MICRO-24), Nov. 1991
- B.Calder, B.Reinman and D.Tullsen, 'Selective Value Prediction,' Proceedings of the 26,h International Symposium on Computer Architecture (ISCA-26), May 1999 https://doi.org/10.1109/ISCA.1999.765940
- F.Gabbay, and A. Mendclson, 'Speculative Execution Based on Value Prediction,' EE Department TR 1080, Technion-Israel Institute of Technology, Nov, 1996
- F.Gabbay, and A.Mendelson, 'The Effect of Instruction Fetch Bandwidth On Value Prediction,' Proceedings of the 25th International Symposium on Computer Architecture (ISCA-25), p.272-281, 1998 https://doi.org/10.1109/ISCA.1998.694787
- J.Gonzalez and A.Gonzalez, 'The Potential of Data Value Speculation to Boost ILP.' Proceedings of the International Conference on Supercomputing, 1998 https://doi.org/10.1145/277830.277840
- Sang-Jeong Lee and P.Yew. 'Decoupled Value Prediction on Trace Processors,' Proceedings of the 6th International Symposium on High Performance Computer Architecture (HPCA-6), 2000 https://doi.org/10.1109/HPCA.2000.824353
- Sang-Jeong Lee and P.Yew, 'On Some Implementation Issue for Value Prediction on Wide-Issue ILP Processors,' International Conference on Parallel Architecture and Compilation Techniques (PACT 2000), Oct. 2000 https://doi.org/10.1109/PACT.2000.888339
- Sang-Jcong Lee, and Pen-Chung Yew, 'On Table Bandwidth and Its Update Delav for Value Prediction on Wide-Issue ILP Processors,' IEEE Transaction on Computers, Vol.50 No.8, Aug. 2001 https://doi.org/10.1109/12.947012
- M.Lipasti, and J.Shen, 'Exceeding th Limit via Value Prediction,' Proceedings of the 29th International Symposium on Mlicroarchitecture(MICRO29), Dec. 1996
- M.Lipasti, Value Locality and Speculative Execution, Ph.D. thesis, Carnegie Mellon University, April 1997
- B. Rychlik, F.Faistl, D.Krug. A.Kurland, J.Jung, Miroslav, N.Velev, and Jshcn, 'Efficient and Accurate Value Prediction Using Dynamic Classification,' Technical Report of Microachitecture Research Team in Dept of Electrical and Computer Engineering, Carnegie mellon Univ.. 1992
- B.Rychlik, J.Faistl, B.Krug, and J.Shcn, 'Efficacy and Performance Impact of Value Prediction,' Parallel Architectures and Compilation Techniques, Paris, Oct. 1998 https://doi.org/10.1109/PACT.1998.727186
- T.Sato, 'Analyzing Overhead of Reissued Instructions on Data Speculative Processors,' Workshop on Performance Analysis and its impact on Design Held in Conjunction with ISCA-25, 1998
- Y.Sazcides. and J.Smith, 'The Predicatabili.y of Data Values.' Proceedings of the 30th International Symposium on Microarchitecture (MICRO-30l, Dec. 1997 https://doi.org/10.1109/MICRO.1997.645815
- K.Wang. M.Franklin, 'Highly Accurate data value Predictions using Hybrid Predictor,' Proceedings of the 30th International Symposium on Microarchitecture (MICRO-30), Dec. 1997 https://doi.org/10.1109/MICRO.1997.645819
- D.Burger and T.Austin, 'The Simplescalar Tool Sec, Version 2.0,' Technical Report CS-RT-971342, University of Wisconsin, Madison, June 1997
- T.Sherwood and B.Calder, 'Loop Termination Prediction,' Technical Report CS99-639 of University of California, San Diego, Dept. of Computer Science and Engineering, Dec. 1999
- J.Huang and D.Lilja, 'Exploiting Basic Block Value Locality with Basic Block Reuse,' Proceedings of the 5th International Symposium on High Performance Computer Architecture (HPCA-5), 1999 https://doi.org/10.1109/HPCA.1999.744342
- M.Johnson, Supersealar Microprocessor Design, Prentice Hall, 1991