References
- IEEE Journal of Solid-State Circuits v.34 no.12 A 3.3-V, 10-b, 25-MSample/s two-step ADC in 0.35-mu m CMOS van der Ploeg H;Remmers R
- Proceedings of the 24th European Solid-State Circuits Conference A Sub-Binary-Weighted Current Calibration Technique for a 2.5V 100MS/s 8bit ADC M.Mitsuishi;H.Yoshida;M.Sugawara;Y.Kunisaki;S.Nakamura;S.Nakaigawa;H.Suzuki
- IEEE J. Solid-State Circuits v.28 no.12 A 10-b 20-Mhz 20-mW Pipelined Interpolating CMOS ADC K.Kusumoto(et al.)
- IEEE J. Solid-State Circuits v.30 no.12 A 2 V, 10, 20Msample/s, Mixed-Mode Subranging CMOS A/D Converter M.Yotsuyanagi(et al.)
- IEEE J. Solid-State Circuits v.sc-17 no.6 A Precision Variable-Supply CMOS Comparator D.J.Allstot
- IEEE J. Solid-State Circuit v.31 no.6 A 2x2 Analog Memory Implemented with a Special Layout Injector Y.Y.Chai(et al.)
- IEEE Electron Device Lett. v.12 no.3 A floating-gate MOSFET with tunnelling injector fabricated using a standard double-polysilicon CMOS process A.Thomsen(et al.)
- Electronics Letters Floating gate MOSFET with reduced programming voltage Chai,Y.Y.;L.G.Johnson