References
- Handbook of Multilevel Metallization for Integrated Circuits S.R.Wilson;C.J.Tracy
- IEDM Shared Tungsten Structures for FEOL/BEOL Compatibility in Logic-Friendly Merged DRAM J.M.Drynan;K.Fukui
- IITC Metal Bit-line Common Contact Integration Technology in 0.17um-DRAM & Merged DRAM in Logic Devices S.Y.Choi
- Material Research Society v.427 Comparison of CVD and PVD W for Gigabit-scale DRAM Interconnections in Advanced Metalization for Future ULSI J.M.Drynan;K.Koyama
- IEDM Low Temperature Metal-based Cell Integration Technology for Gigabit and Embeded DRAMs M.Yoshida;T.Kumauchi;K.Kawakita
- IEDM Ion Metal Plasma Deposited Titanium Liners for 0.25/0.18um Multilevel Interconnections G.A.Dixit;W.Y.Hsn