Backend of a Parallelizing Compiler for an Heterogeneous Parallel System

이기종 병렬 시스템을 위한 자동적 병렬화 컴파일러 후위

  • Published : 2000.08.15

Abstract

Many multiprocessing systems have been developed to exploit the parallelism and to improve the performance. However, the naive multiprocessing schemes were not successful as many researchers thought, due to the heavy cost of communication and synchronization resulting from parallelization. In this paper, we will identify the reasons for the poor performance and the compiler requirements for the performance improvement. We realized that the decisions for multiprocessing should be derived by the overhead information. We applied this idea to the automatic parallelizing compiler, SUIF. We substituted the original backend of SUIF with our backend using MPI, and gave it the capability to validate parallelization decisions based on overhead parameters. This backend converts the intermediate code containing spacification of parallelizable regions into the distributed-memory based parallel program with MPI function calls without excessive parallelization that may cause performance degradation.

고전적 시스템의 성능 향상을 위해 많은 병렬 처리 시스템들이 제안되어 왔다. 그러나 이들 시스템들은 흔히 통신과 동기화 부담을 과소 평가함으로써 기대한 만큼의 성능을 보이지 못하였다. 본 논문에서는 그러한 결과를 초래하는 이유를 설명하고, 병렬화 컴파일러가 만족시켜야 하는 성능상의 요구조건을 제시한다. 병렬화 결정은 성능 저하를 피하기 위해 반드시 통신과 동기화 부담(overhead)에 대한 분석에 기초하여 이루어져야 한다. 본 연구진은 이러한 발상을 자동적 병렬화 컴파일러 SUIF에 적용하여 SUIF의 후위를 MPI 함수를 이용하는 새로운 후위로 교체하고, 여기에 병렬화 결정의 타당성을 부담 정보에 기초하여 평가하는 능력을 부여하였다. 새로운 컴파일러 후위는 병렬화 가능한 부분이 명시된 SUIF 중간 코드를, 성능 저하를 초래하지 않으면서 MPI 함수 호출을 포함하는 분산 메모리 구조 병렬 프로그램으로 변환한다.

Keywords

References

  1. Thomas E. Anderson, David E. Culler, and David A. Patterson, 'A Case for Networks of Workstations: NOW,' IEEE Micro, Feb, 1995 https://doi.org/10.1109/40.342018
  2. Seema Hiranandani, Ken Kennedy, and Chau-Wen Tseng, 'Compiling Fortran D for MIMD distributed-memory machines,' Communications of the ACM, Vol. 35, No. 8 (Aug. 1992), Pages 66-80 https://doi.org/10.1145/135226.135230
  3. High Performance Fortran Language Specification Version 1.0, May 1993
  4. M. W. Hall, J. M. Anderson, S. P. Amarasinghe, B. R. Murphy, S.-W. Liao, E Bugnion Bugnion and M.S. Lam, 'Maximizing Multiprocessor Performance with the SUIF compiler,' IEEE Computer, December 1996 https://doi.org/10.1109/2.546613
  5. D. A. Padua et al., 'Polaris: A new-generation parallelizing comiler for MPPs,' Technical Report CSRD-1306, Center for Supercomputing Research and Development, Univ. of Illinois at Uurbana-Champaign, June 1993
  6. William Gropp, Ewing Lusk, Nathan Doss, and Anthony Skellum, 'A high-performance, portable implementation of the MPI message-passing interface standard,' Parallel Computing, 22:789-828, 1996 https://doi.org/10.1016/0167-8191(96)00024-5
  7. MPI Primer / Developing With LAM (manual), Ohio Supercomputer Center, 1996
  8. A.V.Aho et al., Compilers - Principles, Techniques, and Tools, Addison Wesley, pp.585-711, 1986
  9. Keqin Li, 'Predicting the Performance of Partitionable Multiprocessors,' Proc. Of PDPTA96 International Conference, pp 1350-1353., 1996
  10. Edward W. Felton et al., 'Early Experience with Message-Passing on the SHRIMP Multiprocessor,' Proc. of ISCA'96, pp. 296-307 https://doi.org/10.1145/232973.233004
  11. Joseph A. Fisher, 'Trace Scheduling: A Technique for Global Microcode Compaction,' IEEE Transaction on Computers, Vol C-30, No 7, pp. 478-490, July 1981 https://doi.org/10.1109/TC.1981.1675827
  12. Anant Agarwal et al., 'Automatic Partitioning of Parallel Loops and Data Arrays for Distributed Shared-Memory Multiprocessors,' IEEE Transactions on Parallel and Distributed Systems Vol. 6, No. 9, September, 1995 https://doi.org/10.1109/71.466632
  13. Rudolf Eigenmann, Insung Park, and Michael J. Voss. 'Are Parallel Workstations the Right Target for Parallelizing Compilers?,' Lecture Notes in Computer Science, No. 1239: Languages and Compilers for Parallel Computing, March 1997 https://doi.org/10.1007/BFb0017260