Analysis of Residual Stresses Induced during Adhesion Process of Chip and Leadframe

칩과 리드페임의 접착과정에서 발생하는 잔류 응력 해석

  • 이상순 (한국기술교육대학교 메카트로닉스공학부)
  • Published : 2000.03.01


This paper deals with residual stresses induced at the viscoelastic adhesive layer between the semiconductor chip and the leadframe during adhesion process. The adhesive layer has been assumed to be“thermorheologically simple”. The time-domain boundary element method(BEM) has been employed to investigate the behavior of interface stresses. Numerical results show that very large stress gradients are present at the interface corner and such singularity might lead to local yielding or edge delamination.

이 논문에서는, 반도체 칩과 리드프레임을 결합하는 과정에서 점탄성 접착제층에 발생하는 잔류응력 문제를 다루고 있다. 접착제층은 “열유동단순”거동을 한다고 가정하였다. 접착제층에서의 응력들은 경계요소법을 사용하여 조사하였다. 매우 큰 응력 구배가 계면 모서리에서 발생하는데, 그러한 응력들은 국부 항복을 일으키거나, 칩과 리드프레임의 박리를 야기시킬 수 있음을 보여주고 있다.



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