마이크로전자및패키징학회지 (Journal of the Microelectronics and Packaging Society)
- 제7권4호
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- Pages.17-22
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- 2000
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- 1226-9360(pISSN)
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- 2287-7525(eISSN)
A Study of Wire Sweep During Encapsulation of Semiconductor Chips
- Han, Se-Jin (Sibley School of Mechanical and Aerospace Engineering, Cornell University) ;
- Huh, Yong-Jeong (School of Mechatronics Eng., Korea University of Technology and Education)
- 발행 : 2000.11.01
초록
In this paper, methods to analyze wire sweep during the semiconductor chip encapsulation have been studied. The wire sweep analysis is used to analyze the deformation of bonding wires that connect the chip to the leadframe during encapsulation. The analysis is done using either analytical solutions or numerical simulation. The analytical solution is used for rough but fast calculation of wire sweep. The results from the numerical simulation are closest to the experimental results.
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