New Test Generation for Sequential Circuits Based on State Information Learning

상태 정보 학습을 이용한 새로운 순차회로 ATPG 기법

  • 이재훈 (중앙대학교 전자전기공학부) ;
  • 송오영 (중앙대학교 전자전기공학부)
  • Published : 2000.04.01

Abstract

While research of ATPG(automatic test pattern generation) for combinational circuits almost reaches a satisfiable level, one for sequential circuits still requires more research. In this paper, we propose new algorithm for sequential ATPG based on state information learning. By efficiently storing the information of the state searched during the process of test pattern generation and using the state information that has been already stored, test pattern generation becomes more efficient in time, fault coverage, and the number of test patterns. Through some experiments with ISCAS '89 benchmark circuits, the efficiency of the proposed method is shown.

조합형 회로에 대한 테스트 패턴 생성의 문제는 거의 만족할 만한 수준에 도달한데 반해 순차형 회로에 대한 테스트 패턴 생성은 여전히 많은 연구를 필요로 하고 있다. 본 연구에서는 효율적인 검사 패턴 생성을 위하여 검사 패턴 생성 과정에서 탐색되어지는 상태 공간 정보의 효율적으로 저장하고, 그렇게 저장된 상태 공간 정보를 이용하여 효율적으로 검사패턴을 생성하는 알고리즘을 제안한다. 그리고 제안된 알고리즘과 기존의 결정적 검사 패턴 생성 알고리즘을 실험을 통하여 비교함으로써 제안된 알고리즘의 효율성을 검증한다.

Keywords

References

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