Controller Design and Dynamic Performance Analysis of UPFC based on 3-Level Inverters

3-레벨 인버터 UPFC의 제어기설계와 동특성해석

  • 한병문 (명지대 전기정보제어공학부)
  • Published : 2000.06.01

Abstract

This paper describes a controller design and dynamic performance analysis of UPFC based on 3-level inverters. Major attention is focused on the controller design for both shunt and series inverters, including regulator design for the dc link voltage sharing across the dc capacitors. An energy-based approach was investigated for effectively designing the controller. A detailed UPFC model has been developed with EMTP using 24-pulse 3-level inverters to verify this approach. Simulation results about dynamic performance of UPFC confirm effects for increasing transmission capacity and damping low-frequency oscillation. The developed simulation model would be very effective to analyze the dynamic performance of UPFC.

Keywords

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