전기전자학회논문지 (Journal of IKEEE)
- 제3권1호
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- Pages.126-132
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- 1999
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- 1226-7244(pISSN)
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- 2288-243X(eISSN)
A Study of Jitter Reduction for SDH Transmission System using Sigma-Delta Modulation
- Han, Wook (Dept. of Electronic Engineering, Konkuk Univ.) ;
- Chang, Jin-Hyeon (Dept. of Electronic Engineering, Konkuk Univ.) ;
- Kim, Yung-Kwon (Dept. of Electronic Engineering, Konkuk Univ.)
- 발행 : 1999.07.01
초록
The SDH (Synchronous Digital Hierarchy) has been rapidly acknowledged as a world wide transmission standard replacing the existing PDH infrastructure. A bit stuffing is used for synchronization between a PDH signal and a SDH node, and a pointer justification is used for synchronization between one SDH node and the other SDH node. During above processes - a bit stuffing and a pointer processing -, a stuffing jitter and a pointer Jitter are produced and the generated jitter can cause transmission error. In this study, a stuffing jitter and a pointer jitter are modeled and analyzed. A Sigma-Delta modulation is described and an advanced jitter reduction technique using a Sigma-Delta modulation technique in the Synchronizer, Pointer Processor and Desynchronizer is provided.
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