Journal of the Korean institute of surface engineering (한국표면공학회지)
- Volume 32 Issue 3
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- Pages.239-243
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- 1999
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- 1225-8024(pISSN)
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- 2288-8403(eISSN)
CHARACTERIZATION OF METALLIC CONTAMINATION OF SILICON WAFER SURFACES FOR 1G DRAM USING SYNCHROTRON ACCELERATOR
- Kim, Heung-Rak (Research Institute of Industrial Science and Technology) ;
- Kun-Kul, Ryoo (Soonchunhyang University)
- Published : 1999.06.01
Abstract
At Present, 200mm wafer technology is being applied for commercial fabrications of 64, 128, and 256 M DRAM devices, and 300mm technology will be evolved for 1G DRAM devices in the early 21th century, recognizing limitations of several process technologies. In particular recognition has been realized in harmful effects of surface contamination of trace metals introduced during devicing processes. Such a guide line for surface metal contamination has been proposed as 1E9 and 1E10 atoms/