Comparison of High Speed Modular Multiplication and Design of Expansible Systolic Array

고속 모듈러 승산의 비교와 확장 가능한 시스톨릭 어레이의 설계

This paper derived Montgomery's parallel algorithms for modular multiplication based on Walter's and Iwamura's method, and compared data dependence graph of each parallel algorithm. Comparing the result, Walter's parallel algorithm has small computational index in data dependence graph, so it is selected and used to computed spatial and temporal pipelining diagrams with each projection direction for designing expansible bit-level systolic array. We also evaluated internal operation of proposed expansible systolic array C++ language.