References
- A 256Meg SDRAM BIST for Disturb Test Application J. Powell;F. Hii;D. Cline
- Testability Strategy of the Alpha AXP 21164 Microprocessor K. Bhavsar;H. Edmondson
- IEEE Journal of Solid-State Curcuits v.27 no.11 A 30-ns 64-Mb DRAM with Built-in Self-Test and Self-Repair Function A. Tanabe(et al.)
- IEEE Journal of Solid-State Curcuits v.26 no.11 A 45-ns 64-Mb DRAM with a Merged Match-Line Test Architecture S. Mori(et al.)
- NIKKEI MICRODEVICES 今後의 DRAM 開發은 性能追求와 Cost 追求로 分化 池田博明
- Advanced Electronics Series 超LSI 메모리 伊藤淸男
- 메모리의 現狀과 動向: 256M, 1G Bit 시대로 O. Kimura
- Science Forum ULSI DRAM 技術 吉原務;赤坂洋(외8명)
- Testing Semiconductor Memories: Theory and Practice A.J. van de Goor
- Semiconductor Memories B. Prince
- New DRAM Technologies S.A. Przybylski
- Digest 1991 IEEE VLSI Test Symp. Enhanced Fault Modeling for DRAM Test and Analysis H. Oberle;M. Maue;P. Muhmenthaler
- Inductive Contamination Analysis(ICA) with SRAM Application J. Khare;W. Maly
- Wafer Burn-in(WBI) Technology for RAM's T. Furuyama(et al.)
- Automatic Testing and Evaluation of Digital Integrated Circuits J.T. Healy
- DRAM의 설계 유희준
- Circuits, Interconnections, and Packaging for VLSI H.B. Bakoglu
- Low Power Design Methodologies J.M. Rabaey;M. Pedram