References
- Proceedings, ICCAD A Comparative Study of DFT Methods Using High-Level and Gate-Level Descriptions V. Chickermane;J. Lee;J. Patel
- Proceedings of the Design Automation Conference High-Level Synthesis for Testability: A Survey and Perspective K. D. Wagner;S. Dey
- McGRAW-HILL International (Editions) Synthesis and Optimization of Digital Circuits G. De Micheli
- IEEE Trans. on Computer-Aided Design v.13 no.6 Structural and Behavioral Synthesis for Testability Techniques C. Chen;T. Karnik;D. G. Saab
- Proc. Int'l Conf. on Computer-Aided Design Enhancing High-Level Control-Flow for Improved Testability F. F. Hsu;E. M. Rudnick;J. H. Patel
- Proceedings, Int'l Test Conf. Testability Enhancement for Behavioral Descriptions Containing Conditional Statements K. A. Ockunzzi;C. A. Papachristou
- IEEE Trans. on Computer-Aided Design v.14 no.9 Behavioral Synthesis of Area-Efficient Testable Designs Using Interaction Between Hardware Sharing and Partial Scan M. Potkonjak;S. Dey;R. K. Roy
- Proceedings of the Design Automation Conference A Data-Path Synthesis Method for Self-Testable Designs C. Papachristou;S. Chiu;H. Harmanani
- Proceedings of the International Conference on Computer Aided Design Behavioral Synthesis for Easy Testability in Data-Path Scheduling T. Lee;W. Wolf;N. Jha
- Proceedings of the Design Automation Conference Data Path Allocation for Synthesizing RTL Designs with Low BIST Area Overhead I. Parulkar;S. Gupta;M. A. Breuer
- Proceedings of the Design Automation Conference Introducing Redundant Computations in a Behavior for Reducing BIST Resources I. Parulkar;S. Gupta;M. A. Breuer