Journal of the Korean Institute of Telematics and Electronics D (전자공학회논문지D)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

A Plated Through Hole Model and A Connector Model for HSPICE

HSPICE용 plated through hole (PTH) 모형과 커넥터 모형

  • 이명호 (한국전자통신연구원 ATM기술 연구부 ATM교환연구실) ;
  • 전용일 (한국전자통신연구원 ATM기술 연구부 ATM교환연구실) ;
  • 전병윤 (한국전자통신연구원 ATM기술 연구부 ATM교환연구실) ;
  • 박권철 (한국전자통신연구원 ATM기술 연구부 ATM교환연구실) ;
  • 강석열 (한국전자통신연구원 ATM기술연구부)
  • Published : 1998.07.01
Download PDF
⟨ Previous Next ⟩

Abstract

Generally, electronic packaging designer uses HSPICE SOFTWARE TOOL to validate electric characteristics of traces layout before layout traces in PCB in hundreds Mb/s high speed digital circuits. We are in need of a plated through hole (PTH) model and a connector model to use HSPICE SOFTWARE TOOL. Those models have not been perfectly defined for HSPICE simulation. In this paper, we define a PTH model and a connector model for HSPICE simulation and discuss application range for these models. Th emodels are analytic models very applicable for HSPICE simulation and are used to analyze electric characteristic of the PTH and the connector in thetraces layout in high speed digital circuit.

Keywords