전자공학회논문지C (Journal of the Korean Institute of Telematics and Electronics C)
- 제35C권4호
- /
- Pages.1-10
- /
- 1998
- /
- 1226-5853(pISSN)
조합논리회로의 고장 검출율 개선을 위한 회로분할기법
Circuit partitioning to enhance the fault coverage for combinational logic
초록
Partitioning problem of large combinational logic has been studied in real world. Most of logic include undectable faults from the structure of it's redundant, fan-out-reconvergent, and symetrical feature. BPT algorithm is proposed to enhance the fault voverage for combinational logic partitioning. This algorithm partitions the logic by cut the lines related to undetectable structure when seperating. Controllability and observability are considered in the process of partitioning. This algorithm is evaluated effective by testing ISCAS85 circuits.
키워드