Performance Evaluation of Buffer Management Schemes for Implementing ATM Cell Reassembly Mechanism

  • Published : 1997.06.01

Abstract

An ATM switching system may be designed so that communications between processors of its control part can be performed via its switching network rather than a separate inter-processor communications (IPC) network. In such a system, there should be interfaces to convent IPC traffic from message format to cell format and vice versa, that is, mechanisms to perform the SAR (Segmentation And Reassembly) sublayer functions. In this paper, we concern the cell reassembly mechanism among them, mainly focussed on buffer management schemes. We consider a few alternatives to implement cell reassembly function block, namely, separated buffering, reserved buffering and shared buffering in this paper. In case of separated and reserved buffering, we employ a continuous time Markov chain for the performance evaluation of cell reassembly mechanism, judicially defining the states of the mechanism. Performance measures such as measage loss probability, mean number of message queued in buffer and average reassembly delay are obtianed in closed forms. In case of shared buffering, we compare the alternatives for implementing cell reassembly function block using simulation because it is almost impossible to analyze the mechanism of shared buffering by analytical modeling. Some illustrations are given for the performance analysis of the alternatives to implement cell reassembly function block.

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References

  1. IEEE Trans. Commun. v.COM-32 The behavior of a finite queue with batch Poisson inputs resulting from message packetization and a single server J.Chang;R-F Chang
  2. IEEE Trans. Commun. v.COM-30 Analysis of finite storage systems with batch input arising out of message packetization D.R.Manifield;P.Tran-Gia
  3. IEEE J. Select. Areas Commun. v.11 no.2 ATM receiver implementation issues T.Moors;A.Cantoni
  4. Proc. of IEEE INFOCOM'92 Buffer sizing at a host in an ATM network D.E.Smith;H.J.Chao
  5. Proc. ITC 14 Modeling of segmentation and reassembly processes in communication nerwork G.J.Heijenk;M.E.Zarki;I.G.Niemegeers
  6. Asynchronous Transfer Mode Network : Performance Issues R.O.Onvural
  7. Proc. of JC-CNSS'94 Buffer management schemes for implement cell reassembly mechanism and their performance analysis G.Park;S.Kang;Y.Kim
  8. ETRI Journal v.17 no.1 Performance evaluation of a cell reassembly mechanism with individual buffering in an ATM switching system G.Park;S.Kang;C.Han
  9. Introduction to Queueing theory (second ed.) R.B. Cooper
  10. Fundamentals of Queueing Theory(second edition) D.Gross;C.M.Harris
  11. Queueing Systems Vol.1 : Theory L. Kleinrock