Journal of the Korean Institute of Telematics and Electronics D (전자공학회논문지D)
- Volume 34D Issue 1
- /
- Pages.30-34
- /
- 1997
- /
- 1226-5845(pISSN)
New current memory cell with clock-feedthrough reduction scheme
클럭-피드쓰루를 개선한 새로운 전류 기억 소자
Abstract
An improved clock-feedthrough compensation scheme for switche dcurrent system is proposed. Both the signal dependent and the constant clock-feedthrough terms are cancelled by using both NMOS and PMOS current samplers and by adopting a source replication technique. The proposed current memory cell was fabricated with 0.6
Keywords