Journal of the Korean Institute of Telematics and Electronics C (전자공학회논문지C)
- Volume 34C Issue 11
- /
- Pages.12-19
- /
- 1997
- /
- 1226-5853(pISSN)
A kernel-based precomputation scheme for low-power design fo combinational circuits
저전력 논리 회로 설계를 위한 커널에 바탕을 둔 precomputation 알고리듬
Abstract
In this paper, we present a logic synthesis algorithm for low powr design fo combinational circuits. The proposed algorithm reduces power dissipation by eliminating unnecessary signal transitions. The proposed algorithm restructures a given circuit by using a kernel as prediction logic in a precomputation-based scheme such that switching activity of circuit can be minimized. Experimental results show that the system is efficient for low power design of combinational circuits.
Keywords