Journal of Electrical Engineering and information Science
- Volume 1 Issue 2
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- Pages.15-26
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- 1996
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- 1226-1262(pISSN)
Design and Implementation of a Massively Parallel Multithreaded Architecture: DAVRID
- Sangho Ha (Department of Computer Science, Seoul National University) ;
- Kim, Junghwan (Department of Computer Science, Seoul National University) ;
- Park, Eunha (Department of Computer Science, Seoul National University) ;
- Yoonhee Hah (Department of Computer Science, Seoul National University) ;
- Sangyong Han (Department of Computer Science, Seoul National University) ;
- Daejoon Hwang (Department of Information Engineering, SungKyunkwan University) ;
- Kim, Heunghwan (Department of Computer Science, Seowon University) ;
- Seungho Cho (Department of Computer Science, Kangnam University)
- Published : 1996.06.01
Abstract
MPAs(Massively Parallel Architectures) should address two fundamental issues for scalability: synchronization and communication latency. Dataflow architecture faces problems of excessive synchronization overhead and inefficient execution of sequential programs while they offer the ability to exploit massive parallelism inherent in programs. In contrast, MPAs based on von Neumann computational model may suffer from inefficient synchronization mechanism and communication latency. DAVRID (DAtaflow/Von Neumann RISC hybrID) is a massively parallel multithreaded architecture which takes advantages of von Neumann and dataflow models. It has good single thread performance as well as tolerates synchronization and communication latency. In this paper, we describe the DAVRID architecture in detail and evaluate its performance through simulation runs over several benchmarks.
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