Journal of the Korean Institute of Telematics and Electronics B (전자공학회논문지B)
- Volume 33B Issue 3
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- Pages.186-192
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- 1996
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- 1016-135X(pISSN)
Implementation of artificial neural network with on-chip learning circuitry
학습 기능을 내장한 신경 회로망의 하드웨어 구현
Abstract
A modified learning rule is introduced for the implementation of feedforward artificial neural networks with on-chip learning circuitry using standard analog CMOS technology. Learning rule, is modified form the EBP (error back propagation) rule which is one of the well-known learning rules for the feedforward rtificial neural nets(FANNs). The employed MEBP ( modified EBP) rule is well - suited for the hardware implementation of FANNs with on-chip learning rule. As a ynapse circuit, a four-quadrant vector-product linear multiplier is employed, whose input/output signals are given with voltage units. Two
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