Journal of the Korean Institute of Telematics and Electronics B (전자공학회논문지B)
- Volume 32B Issue 5
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- Pages.661-670
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- 1995
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- 1016-135X(pISSN)
A Fast Automatic Test Pattern Generator Using Massive Parallelism
대량의 병렬성을 이용한 고속 자동 테스트 패턴 생성기
Abstract
This paper presents a fast massively parallel automatic test pattern generator for digital combinational logic circuits using neural networks. Automatic test pattern generation neural network(ATPGNN) evolves its state to a stable local minima by exchanging messages among neural network modules. In preprocessing phase, we calculate the essential assignments for the stuck-at faults in fault list by adopting dominator concept. It makes more neurons be fixed and the system speed up. Consequently. fast test pattern generation is achieved. Test patterns for stuck-open faults are generated through getting initialization patterns for the obtained stuck-at faults in the corresponding ATPGNN.
Keywords