Journal of the Korean Institute of Telematics and Electronics B (전자공학회논문지B)
- Volume 31B Issue 7
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- Pages.42-48
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- 1994
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- 1016-135X(pISSN)
Design of A High-Speed Current-Mode Analog-to-Digital Converter
고속 전류 구동 Analog-to-digital 변환기의 설계
Abstract
In this paper, a low power and high speed flash Analog-to-Digital Converter using current-mode concept is proposed. Current-mode approach offers a number of advantages over conventional voltage-mode approach, such as lower power consumption small chip area improved accuracy etc. Rescently this concept was applied to algorithmic A/D Converter. But, its conversion speed is limited to medium speed. Consequently this converter is not applicable to the high speed signal processing system. This ADC is fabricated in 1.2um double metal CMOS standard process. This ADC's conversion time is measured to be 7MHz, and power consumption is 2.0mW, and differential nonlinearity is less than 1.14LSB and total harmonic distortion is -50dB. The active area of analog chip is about 350 x 550u
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