한국통신학회논문지 (The Journal of Korean Institute of Communications and Information Sciences)
- 제19권6호
- /
- Pages.1046-1055
- /
- 1994
- /
- 1226-4717(pISSN)
- /
- 2287-3880(eISSN)
영상 신호처리를 위한 고속 VRAM ASIC 설계
Design of High Speed VRAM ASIC for Image Signal Processing
- Seol, Wook (Dept. of Electronic Engineering WonKwang University) ;
- Song, Chang-Young (Dept. of Electronic Engineering WonKwang University) ;
- Kim, Dae-Soon (Dept. of Electronic Engineering WonKwang University) ;
- Kim, Hwan-Yong (Dept. of Electronic Engineering WonKwang University)
- 발행 : 1994.06.01
초록
본 논문에서는 영상 신호처리에 적합한 고속 1 line VRAM을 ASIC화 설계하기 위하여 엑세스 시간특성 및 집적도가 우수한 3-TR dual-port 다이나믹 셀을 채용하여 메모리 코어를 설계하였다. 고속 파이프라인 동작을 위하여 서브어레이 1로부터 첫 행을 분리하였고, TM기 비트 라인에 데이터 래치 구조를 채용하여 한 번지의 동시 입.출력이 가능하도록 설계하였다. 주변 회로로 번지 선택기, 1/2V 전압 발생기를 각각 설계하여 개선된 동작특성을 확인한 후 1.5[ m] CMOS 설계규칙을 이용하여 ASIC화 설계하였다.
In this paper, to design high speed 1 line VRAM(Video RAM) suitable for image signal processing with ASIC(Application Specific IC) method, the VRAM memory core has been designed using 3-TR dual-port dynamic cell which has excellent access time and integration characteristics. High speed pipeline operation was attained by separating the first row from the subarray 1 memory core and the simultaneous I/Q operation for a selected single address was made possible by adopting data-latch scheme. Peripheral circuits were designed implementing address selector and 1/2V voltage generator. Integrated ASIC has been optimized using 1.5[ m] CMOS design rule.
키워드