Analytical Delay-Time Modeling of BICMOS Buffere

BICMOS 버퍼의 해석적 지연시간 모델링

A model for BICMOS buffer switching operation is presented, including the influence of bipolar base transit time and collector-base capacitances. A closed-form solution for the propagation delay-time is obtained assuming low level injection and channel velocity limitation. For the high level injection case, the delay-times are numerically obtained using effective current gain. These results are compared with those by HSPICE simulation, which shows good agreement. It is noted that the collector-base capacitance strongly affects the delay-time. The effects of voltage scaling are also investigated, which shows the model can be applied for the reduced supply voltages.