The Development of the User Interface Tool for DSP Silicon Compiler

디지틀 신호처리용 실리콘 컴파일러를 위한 사용자 툴 개발

The DSP silicon compiler consists of language compiler, module generator, placement tool, router, layout generation tools, and simulator. In this paper, The language compiler, the module generator, placement tool, and simulator were developed and provided for the system designer. The language compiler translates the designer's system description language into the intermediate form file. The intermediate form file expresses the interconnections and specifications of the cells in the cell library. The simulator was developed and provided for the behavioral verification of the DSP system. For its implementation, the event-driven technique and the C$^{++}$ task library was used. The module generator was developed for the layout of the verified DSP system, and generates the functional block to be used in the DSP chip. And then the placement tool determines the appropriate positions of the cells in the DSP chip. In this paper, the placement tool was implemented by Min-Cut and Simulated Annealing algorithm. The placement process can be controlled by the several conditions input by the system designer.